 Harry Mellor
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fb946a7f89
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Make mypy opt-out instead of opt-in (#33205)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-01-29 09:12:26 +00:00 |
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Angela Yi
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4197168ea5
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[ez] Remove checks for torch version <= 2.8 (#33209)
Signed-off-by: angelayi <yiangela7@gmail.com>
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2026-01-28 16:03:56 -05:00 |
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Rohan Potdar
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59bcc5b6f2
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Use aiter triton fused_add_rmsnorm_pad for gpt-oss (#30976)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
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2026-01-28 20:47:47 +00:00 |
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Alex Sun
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49a1262267
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[AMD][ROCm] MoRI EP: a high-performance all2all backend (#28664)
Signed-off-by: Alex Sun <alex.s@amd.com>
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2026-01-22 16:33:18 +08:00 |
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Xin Yang
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63227accf5
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[Kernel] Add topk_sigmoid kernel (#31246)
Signed-off-by: Xin Yang <xyangx@amazon.com>
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2026-01-21 22:49:51 +00:00 |
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Pleaplusone
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6c20e89c02
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[ROCm][Deepseekv3.2] Refactor Sparse Indexer as CustomOp (#29287)
Signed-off-by: ganyi <ygan@amd.com>
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2026-01-21 23:16:30 +08:00 |
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vllmellm
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148117ea2e
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[Refactor] Make FP8 Linear Ops use kernel abstraction (#27814)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2026-01-20 14:48:20 +08:00 |
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Aleksandr MalyshevandAleksandr Malyshev
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8c11001ba2
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[ROCM] DSfp4 mla projection gemms weight dynamic quantization (#32238)
Signed-off-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: Aleksandr Malyshev <maleksan@amd.com>
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2026-01-15 14:13:08 -06:00 |
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Pleaplusone
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130d6c9514
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[ROCm][Perf] Enable shuffle kv cache layout and assembly paged attention kernel for AiterFlashAttentionBackend (#29887)
Signed-off-by: ganyi <ygan@amd.com>
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2026-01-15 15:29:53 +00:00 |
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Kevin McKayandClaude Opus 4.5
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1fb0209bbc
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[Bugfix][Hardware][AMD] Fix exception types in AITER MLA FP8 check (#31177)
Signed-off-by: c0de128 <kevin.mckay@outlook.com>
Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
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2026-01-06 14:10:59 +08:00 |
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Tres
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3133c192a3
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[ROCM] Reorder arguments and rename parameters for rope_cached_thd_positions_2c_fwd_inplace (#29993)
Signed-off-by: Tres Popp <tres.popp@amd.com>
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2026-01-05 15:37:57 +08:00 |
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zejunchen-zejun
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dabff12ed3
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[Bugfix][ROCm][Dynamo][DS 3.1][FP8] fix unsupported hasattr call when Dynamo tracing for ROCm device (#31149)
Signed-off-by: zejunchen-zejun <zejun.chen@amd.com>
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2025-12-23 21:32:19 -08:00 |
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vllmellmandTJian
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f32cfd7d97
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[ROCm][FEAT] Support AITER RMSNorm quantization fusion pass (#26575)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2025-12-23 02:07:54 -08:00 |
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Kevin McKayandClaude Sonnet 4.5
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cf8eed7bef
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[Bugfix][ROCm] Fix typo: is_linear_fp8_enaled -> is_linear_fp8_enabled (#31109)
Signed-off-by: c0de128 <kevin.mckay@outlook.com>
Co-authored-by: Claude Sonnet 4.5 <noreply@anthropic.com>
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2025-12-21 21:14:58 -08:00 |
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vllmellm
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96bf50a2c0
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[ROCm] Serving Fails on Radeon Due to AITER Dtype Import (#30952)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2025-12-18 11:47:46 +00:00 |
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TJian
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d0fb572929
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[ROCm] [AITER] [DOC] Add usage description about check functions in _aiter_ops (#30586)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2025-12-16 13:50:47 +00:00 |
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3c680f4a17
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[Rocm][torch.compile] Adding layernorm + fp8 block quant and silu + fp8 block quant for Aiter (#25693)
Signed-off-by: charlifu <charlifu@amd.com>
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Signed-off-by: Charlie Fu <Charlie.Fu@amd.com>
Co-authored-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: wuhuikx <hattie.wu@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Gregory Shtrasberg <156009573+gshtras@users.noreply.github.com>
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2025-12-09 22:39:26 +00:00 |
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vllmellm
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ee14644ba9
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[ROCm] Aiter Quant Kernels (#25552)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2025-12-09 14:27:37 +00:00 |
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Ye (Charlotte) Qi
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b8a6ae4158
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[ROCm] add fallback for aiter fp8 decode mla (#30005)
Signed-off-by: Ye (Charlotte) Qi <yeq@meta.com>
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2025-12-04 08:45:57 +00:00 |
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gbyu-amdandguanbao
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cb7214d8ea
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[ROCm][MLA] enable fp8 MLA decode on ROCm (#28032)
Signed-off-by: guanbao <gyu@amd.com>
Signed-off-by: Guanbao Yu <gyu@amd.com>
Signed-off-by: gbyu-amd <Guanbao.Yu@amd.com>
Co-authored-by: guanbao <gyu@amd.com>
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2025-11-25 10:15:02 +08:00 |
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Aleksandr MalyshevandAleksandr Malyshev
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b7f1f490a6
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Upstream triton fp4 weight preshuffle (#28888)
Signed-off-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: Aleksandr Malyshev <maleksan@amd.com>
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2025-11-21 11:34:46 -05:00 |
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TJian
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a425dc256e
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[Bugfix] [ROCm] [AITER]: Fix aiter block quant not compatible with torch compile dynamo (#28716)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2025-11-14 10:30:50 -08:00 |
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Mohammad Othman
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a17e36f223
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Fix typo in comment: existance -> existence (#28737)
Signed-off-by: Mohammad Othman <emranm226@hotmail.com>
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2025-11-14 09:35:45 -08:00 |
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vllmellm
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d8140b9833
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[ROCM] Fix ROCm warnings, environment flag access, and GEMM kernel naming for consistency in _aiter_ops.py (#28464)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2025-11-12 21:46:57 +00:00 |
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Michael Goin
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f2d9ad0620
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Only register rocm_aiter_ops if aiter is found (#28428)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-11 02:53:24 +00:00 |
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vllmellmandLuka Govedič
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f080a83511
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[RFC][ROCm][AITER] Keep all AITER kernels in _aiter_ops class like _custom_ops and _ipex_ops (#24490)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2025-11-10 08:20:53 -08:00 |
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