 Misha Goin
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25965ee583
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[Kernel] Remove AllSpark INT8 W8A16 GEMM backend (#58001)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-22 14:07:34 -07:00 |
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Divakar VermaandAndreas Karatzas
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d1f63f2af9
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[ROCm][CI] Add GELU activation for AiterExperts in the modular-kernel coverage (#58030)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-22 14:39:13 -05:00 |
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ca831d1c55
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[ROCm][DSv4.1][Perf] Fuse the inverse RoPE into the sparse decode reduce (#57435)
Signed-off-by: Fangzhou Ai <fangzhou.ai@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-22 18:05:11 +00:00 |
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066ee91197
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[Bugfix][Attention] Avoid NaN in the Triton softcap for large attention logits (#56579)
Signed-off-by: Kushal Dabbe <72650064+kushaldabbe@users.noreply.github.com>
Co-authored-by: opencode <noreply@opencode.ai>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
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2026-09-22 12:11:05 -04:00 |
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f92b78f6ef
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[Kernel][DSV4.1] Fuse MXFP8 wo_b GEMM with sequence-parallel reduce-scatter (#57428)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Canlin <canlinguosdu@gmail.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-09-22 01:07:17 -07:00 |
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yinfengLiuandShanshan Shen
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2af05512cf
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[Kernel] Add opt-in load-time MXFP4 dequantization (#50814)
Signed-off-by: Liuyinfeng01 <yinfeliu@amd.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-22 14:51:12 +08:00 |
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Mikko TukiainenandCursor
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68363d64ec
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[ROCm][Perf] Avoid extra reshape kernel in Qwen GDN output norm (#47842)
Signed-off-by: Mikko Tukiainen <Mikko.Tukiainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-22 14:38:16 +08:00 |
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a369a7becc
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[Perf][Attention] Reduce GLM sparse MLA preparation overhead (#57458)
Signed-off-by: Summer Yang <girasoleyang@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2026-09-21 17:24:25 -07:00 |
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Garrett GoonandClaude Opus 5
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8bf051cd51
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[Bugfix][Kernel] Skip the fused silu-mul block-quant fast path when a swiglu clamp is set (#57984)
Signed-off-by: Garrett Goon <garrett@primeintellect.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-21 22:38:38 +00:00 |
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Andreas KaratzasandOpenAI Codex
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12972ae40b
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[Bugfix][ROCm] Reject unsupported EP for monolithic AITER MXFP4 MoE (#57866)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 15:30:21 -05:00 |
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Andreas KaratzasandOpenAI Codex
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9179bcd416
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[Bugfix][MoE] Reject hash routing for unsupported monolithic backends (#57867)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 16:28:35 -04:00 |
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874a6b5a06
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[ROCm] Refactor tuned gemms (#55001)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Signed-off-by: afriedri <afriedri@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-21 16:30:16 +00:00 |
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Tuukka Sarviandlarryli2-amd
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e34685dfc0
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[ROCm][DSv4] Enable DSpark adaptive verification (#52362)
Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Signed-off-by: larryli2-amd <larryli2@amd.com>
Co-authored-by: larryli2-amd <larryli2@amd.com>
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2026-09-21 10:03:41 -05:00 |
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Andreas KaratzasandOpenAI Codex
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82daf9f575
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[CI][ROCm] Add ten AMD parity groups (#57876)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 11:08:06 +00:00 |
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Andreas KaratzasandOpenAI Codex
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8902dbb177
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[CI][ROCm] Mirror remaining portable suites without duplicate coverage (#57877)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 04:16:26 -05:00 |
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b8cf275382
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[AMD][Minimax-M3][perf] Enable packed LBHNC AITER QK-norm fusion for MiniMax-M3 on ROCm (#54535)
Signed-off-by: Wei-Ting Liao <wei-ting.liao@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-21 16:38:30 +08:00 |
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Woosuk KwonandOpenAI Codex
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67513c8b67
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[Bugfix][DSV4.1] Restrict mHC overlap to full CUDA graphs (#57874)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 01:16:59 -07:00 |
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Woosuk KwonandCodex
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9a70c233cd
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[Perf][DSV4.1] Fuse TP all-reduce with mHC input preparation (#57643)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-20 20:28:06 -07:00 |
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JohnQinAMD
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6dfd87f596
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[ROCm][DSv4.1] Keep the Engram tables in host memory on ROCm (#57491)
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2026-09-21 10:17:11 +08:00 |
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Woosuk KwonandCodex
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9b49f92344
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[Perf][DSV4.1] Overlap mHC coefficients for small TP batches (#57603)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-20 17:33:17 -07:00 |
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01f1f58f10
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[ROCm][CI] Query HIP device memory for test GPU teardown waits. (#57450)
Signed-off-by: Sheral Kumar <shekumar@amd.com>
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-20 15:20:39 -05:00 |
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7d99c2c4fd
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[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-20 08:11:01 -07:00 |
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Chauncey
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bf01fc4a31
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[GLM-5.3-Flash] Route kpool indexer top-k through the shared SparseIndexerTopk dispatcher (#57546)
Signed-off-by: chaunceyjiang <chaunceyjiang@gmail.com>
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2026-09-20 11:17:59 +00:00 |
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db1bfdd4fb
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[Bugfix][GLM-5.3-Flash] Address kpool tail blocks by the padded indexer stride in the NVIDIA prefill seed kernel (#57477)
Signed-off-by: Jared Wen <w13431838023@gmail.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-20 18:15:04 +08:00 |
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Misha GoinandErinYin
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e5fce7b56b
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[Core][Kernel] Share persistent workspaces for Marlin and Humming (#57421)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: ErinYin <liang.yin@daocloud.io>
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2026-09-20 17:28:33 +08:00 |
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a7fda4c88b
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[Bugfix] Fix SM100 fp8_ds_mla cache scales (#49435)
Signed-off-by: Ariel Bereslavsky <arielb@getimpala.ai>
Signed-off-by: Ariel Bereslavsky <ariel@getimpala.ai>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Ariel Bereslavsky <arielb@getimpala.ai>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-19 17:15:07 -07:00 |
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674b6d95d6
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[CI][Bugfix] Fix MoE reprocess test mock after #57405's kernel refactor (#57641)
Signed-off-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-09-19 21:42:21 +00:00 |
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fbe8a157fb
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[ROCm][Perf] Enable the AITER GDN decode fast path for flat qkvz layouts (#53623)
Signed-off-by: Mikko Tukiainen <Mikko.Tukiainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-09-19 06:05:04 -07:00 |
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Woosuk KwonandCodex
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50d812b66a
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[Perf][DSV4.1] Optimize MegaMoE staging and NVFP4 cache gathers (#57604)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-18 12:57:19 -07:00 |
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frida-andersson
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71fc70d3ae
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[ROCm][DSv4] Fix sparse-indexer logits collapse on gfx950/gfx942 (#50455)
Signed-off-by: Frida Andersson <fanderss@amd.com>
Signed-off-by: frida-andersson <fanderss@amd.com>
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2026-09-18 16:57:44 +00:00 |
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Kevin Liandkevinli
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911548247a
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[Distributed][MoonEP] BF16 integration of MoonEP balanced EP backend (#52101)
Signed-off-by: kevinli <306243285+kaijunli-infr@users.noreply.github.com>
Co-authored-by: kevinli <306243285+kaijunli-infr@users.noreply.github.com>
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2026-09-18 10:34:01 -04:00 |
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Yuwen ZhouandLi, Jiang <jiang1.li@intel.com>
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b346479065
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[CPU] Add CPU FP8 W8A8 linear/MoE support (#49942)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-18 17:59:42 +08:00 |
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olka-amdandClaude Opus 5
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32636580a6
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[Bugfix][MLA] TritonMLA: fix illegal memory access on causal multi-token decode (#51065)
Signed-off-by: Oleksandr Kachur <oleksandr.kachur@amd.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-18 03:49:53 -05:00 |
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Thien TranandCodex
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8da75d6190
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C3x SM100 FP8 blockwise - Pad activation scales to multiple of 4 (#57377)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-18 08:39:27 +00:00 |
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Rohan PotdarandClaude
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213c379fca
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[ROCm][Bugfix] Gate AITER MXFP8 MoE on the aiter enable flag (#57426)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-09-18 00:06:05 +00:00 |
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Misha Goin
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ac78445bc9
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[MoE] Encapsulate TRT-LLM BF16 weight layout handling (#57405)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-17 17:47:30 -04:00 |
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Misha Goin
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9a5bd373cf
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[CI] Retire Weight Loading smoke tests (#57398)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-17 16:04:03 -04:00 |
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ac2f0ea82c
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[MoE][Bugfix] Skip SP padded rows in grouped MoE routing (#56079)
Signed-off-by: Elvir Crncevic <elvircrn@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
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2026-09-17 19:36:19 +00:00 |
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41f9104fa6
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[DSv4.1] Integrate Mega-Gate from DeepGEMM (#56266)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
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2026-09-17 12:06:36 -07:00 |
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afriedri
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a9a7e45f31
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[ROCm] Restore VLLM_ROCM_USE_AITER_FP4_ASM_GEMM and default w4a4 ASM GEMM back to off (#57055)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
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2026-09-17 13:39:52 -05:00 |
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MattandClaude Opus 5
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fef55fd26d
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[ROCm][CI] Adapt MoE tests to the triton_kernels 3.8 API (#57385)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-17 11:21:22 -05:00 |
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Zoe923
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6a7de3ba3a
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[Bugfix][GDN] Fix CuteDSL BF16 KKT inversion divergence (#53864)
Signed-off-by: Zoe923 <871844693@qq.com>
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2026-09-17 08:49:56 -07:00 |
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akii96
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438434b5b5
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[ROCm][Perf] Insert MiniMax-M3 sparse-PA K/V without a contiguous copy (#56849)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-09-17 09:44:54 -05:00 |
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78fdf4efb8
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[Bugfix][MoE] Convert FlashInfer BF16 weights in place (#54699)
Signed-off-by: Yuchen Wang <93700456+yuchenwang3@users.noreply.github.com>
Signed-off-by: Dakai An <dakaian108@gmail.com>
Co-authored-by: Dakai An <dakaian108@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: aoshen02 <aoshen@inferact.ai>
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2026-09-17 22:00:04 +08:00 |
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117cf43fb6
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[HARDWARE][POWER] Enable W8A8 INT8 MoE on POWER (#55316)
Signed-off-by: Rukhaiya <bibirukhaiya123@gmail.com>
Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Antigravity <antigravity@google.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-17 21:45:13 +08:00 |
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Shantipriya Parida
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0eae9acd4d
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[Bugfix][ROCm][MoE] Fall back instead of crashing when AITER MoE is requested for a non-gated (is_act_and_mul=False) model (#56590)
Signed-off-by: Shantipriya Parida <shantipriya.parida@amd.com>
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2026-09-17 13:39:26 +00:00 |
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Lucas WilkinsonandRobert Shaw
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fe284ea17d
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[BugFxi] Fix DeepGEMM FP8 workspace over allocation (#53914)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-09-17 09:35:34 -04:00 |
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Simon Danielsson
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667b26e50b
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[Bugfix][ROCm][GLM-5.3-Flash] Apply deferred tilelang.jit already on attribute access (#57192)
Signed-off-by: simondanielsson <simon.danielsson99@hotmail.com>
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2026-09-17 12:02:39 +00:00 |
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08633cb5cd
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[Qwen3.8-Flash-Next] Enable FP8 TP with FlashInfer TRTLLM MoE (#55867)
Signed-off-by: Canlin <canlinguosdu@gmail.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-09-17 08:56:28 +00:00 |
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3e267bae70
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[ROCm] triton+triton_kernels 3.8 mxfp4 MoE support (gpt-oss + DeepSeek-V4) (#55934)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Co-authored-by: Matt <156021403+mawong-amd@users.noreply.github.com>
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2026-09-16 20:03:34 -05:00 |
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