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afdcbd5d39
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[ROCm][DSv4] Functional fixes for DeepSeek V4 on MI300X/MI325X (#45681)
Signed-off-by: ganyi <ygan@amd.com>
Signed-off-by: Markus Hartikainen <markus.hartikainen@amd.com>
Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Co-authored-by: ganyi <ygan@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Jin Tao <jintao12@amd.com>
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2026-06-18 12:21:14 +00:00 |
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8d4f54966c
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fix(quantization): Fix AWQ dequantize on Intel XPU and refactor AutoAWQ config (#42727)
Signed-off-by: Alex <alex.tech.lab@outlook.com>
Signed-off-by: AlexHuang <jihuihuang@tencent.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-18 20:12:28 +08:00 |
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Yejing LaiandKunshang Ji
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8dd8b6ed78
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[XPU] Fix FP8 block-scaled scheme selection on non-CUDA platforms (#43958)
Signed-off-by: Lai, Yejing <yejing.lai@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-18 10:16:20 +08:00 |
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Wentao Ye
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2659f60a1a
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[Refactor] Remove dead quantization code and tests (#45454)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 16:12:01 -04:00 |
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qli88
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d112eb1ac7
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[feature] MiniMax-M3-MXFP4 support added (#45896)
Signed-off-by: Qiang Li <qiang.li2@amd.com>
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2026-06-17 18:50:48 +00:00 |
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Wentao Ye
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9c7c74bf10
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[Log] Update deepgemm log (#45857)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 15:34:22 +00:00 |
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amirkl94
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8b2b566ea7
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Feature: Enable Flashinfer non-gated MoE bf16 (#43853)
Signed-off-by: Amir Klein <203507526+amirkl94@users.noreply.github.com>
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2026-06-17 14:32:49 +00:00 |
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xaguilar-amd
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0b131b16c9
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[ROCm][AITER][Quark] Tag per-channel FP8 weights as PER_CHANNEL so AITER pre-shuffled GEMM is selected (#44626)
Signed-off-by: Xavier Aguilar <xavier.aguilarfruto@amd.com>
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2026-06-17 14:05:34 +00:00 |
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bcb518ad7a
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[quant][autoround]Refactor INC quantization into package with INCScheme orchestrator (#40601)
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: n1ck-guo <heng.guo@intel.com>
Co-authored-by: Zhenzhong1 <zhenzhong.xu@intel.com>
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2026-06-17 21:51:32 +08:00 |
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Hongxia Yangandtjtanaa
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e28e8c8782
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[ROCm][Quant] Minimax-M3: Enable fp8_per_channel for bf16 weights on mi300x (#45854)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-06-17 12:02:40 +00:00 |
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arghyadeep sarkar
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93bbe94d3a
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[Kernel] Add weightless RMSNorm CUDA kernels for has_weight=False (#41430) (#44109)
Signed-off-by: hello-args <args.sarkar@gmail.com>
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2026-06-16 23:45:55 -07:00 |
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Ting SUNandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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a46abb7ae6
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[Bugfix][Quantization] Reject unsupported compressed tensors KV cache schemes (#45312)
Signed-off-by: Ting Sun <suntcrick@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-17 05:08:41 +00:00 |
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Dakai Anandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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71bc19dbdd
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[Bugfix] Fix MoE model load OOM in FlashInfer_TRTLLM backend with sleep mode (#45589)
Signed-off-by: Dakai An <dakaian108@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 19:36:51 -07:00 |
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sungsoo haandThomas Parnell
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4bf699d310
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[Kernel] Support DS Mamba tail copy for MTP align mode (#45473)
Signed-off-by: Sungsoo Ha <sungsooh@nvidia.com>
Co-authored-by: Thomas Parnell <tom.parnell@gmail.com>
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2026-06-16 22:50:30 +00:00 |
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Hongxia Yang
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f2beaa80c8
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[ROCm][Quant] mxfp8 moe/linear gfx950 tuning for MiniMax-M3 (#45725)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
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2026-06-16 18:50:40 +00:00 |
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yifei wuandHarry Mellor
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a52205bccf
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[Model] Add HrmTextForCausalLM (Hierarchical Reasoning Model — Text) (#43098)
Signed-off-by: Wuyifei <wuyifei@me.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-16 22:41:41 +08:00 |
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Carl Y
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eb04c769d3
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feat: MLA prefill enable FA4 fp8 output (#43050)
Signed-off-by: Carl You <4531192+carlyou@users.noreply.github.com>
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2026-06-16 07:10:59 -07:00 |
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Netanel Haberandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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c5e5c33fcd
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[Bugfix][MoE] Restore routed output unpadding before shared expert add (#45707)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 16:06:28 +03:00 |
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Mike G
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a8c86eeb16
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[Quant] Support modelopt_mixed on Ampere (SM80/SM86) (#45306)
Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
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2026-06-16 08:43:44 -04:00 |
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405c7cf283
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[ZenCPU] Add zencpu Platform Runtime Logging and Docs (#42726)
Signed-off-by: Lalithnarayan C <Lalithnarayan.C@amd.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2026-06-16 08:23:12 -04:00 |
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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3f53e2138f
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[Refactor] Remove Fp8OnlineLinearMethod as scheduled (#45463)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 04:35:58 -07:00 |
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Itay Alroy
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16e91176cf
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[EP] Query NIXL EP top-k index dtype (#45298)
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
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2026-06-15 22:50:18 +00:00 |
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Itay Alroy
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ab8b0fe338
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nixl_ep: Skip post-receive quantization for NVFP4 (#45606)
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
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2026-06-15 22:42:05 +00:00 |
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0a1c5034f5
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[Model] Add MiniMax M3 support (#45381)
Signed-off-by: youkaichao <youkaichao@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-06-16 01:01:25 +08:00 |
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RoyWang
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a3195fab7b
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[AMD][Bugfix][Quantization] Honor fused-name match in is_layer_skipped (#43981)
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2026-06-15 09:37:52 -07:00 |
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Giancarlo Delfinandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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b5adb027ad
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[Models] Fix MiMo v2.x QKV TP sharding + FP4 support (#45200)
Signed-off-by: Giancarlo Delfin <gdelfin@inferact.ai>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-15 15:13:34 +08:00 |
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Amanzhol Salykov
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725c3bc808
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[ROCm][Perf] Enable W4A16 FlyDSL MoE (#44400)
Signed-off-by: amd-asalykov <asalykov@amd.com>
Signed-off-by: Amanzhol Salykov <asalykov@amd.com>
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2026-06-14 00:14:39 -07:00 |
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Marceli FylcekandKunshang Ji
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9548a1887f
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[XPU] Support int4 group_size=32 W4A16 MoE (#45136)
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-14 00:14:35 -07:00 |
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78e7293bb1
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[Build] Fix CUDA arch build coverage gaps (#45277)
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
Co-authored-by: Xin Li <xinli-sw@users.noreply.github.com>
Co-authored-by: ShawRong <ShawRong@users.noreply.github.com>
Co-authored-by: Change72 <Change72@users.noreply.github.com>
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2026-06-13 22:09:20 -07:00 |
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Harry Mellor
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b3f0a0a0df
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Fix docs build on main (#45536)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-13 08:53:23 -07:00 |
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Michael GoinandClaude
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c90650088d
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Add the QuantizedActivation linear-kernel contract (#44260)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-06-12 13:48:15 -07:00 |
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Michael Goin
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9eaacb23ec
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[Kernel] Consolidate Marlin thread-tile padding across all dense Marlin paths (#45295)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-06-12 13:46:21 -07:00 |
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Isotr0py
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6635279d8a
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[Migration] Migrate GGUF quantization support to plugin (#39612)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2026-06-12 12:02:21 -07:00 |
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Yuwen Zhou
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0cd9b7af25
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[CPU] Support CPU W4A16 INT4 MoE (#43409)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-06-12 07:12:37 +00:00 |
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Rohan Potdar
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fe04238292
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[ROCm][gpt-oss] Pass GateMode.INTERLEAVE for MXFP4 W4A16 fused MoE (#44893)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
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2026-06-12 01:02:04 -05:00 |
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eb28452b10
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[Model] Add DiffusionGemma Support (#45163)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Martin Kukla <martin.kukla@cantab.net>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Dipika Sikka <dsikka@redhat.com>
Co-authored-by: NickLucche <nlucches@redhat.com>
Co-authored-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: Alec Kohlhoff <134344302+aleckohlhoff@users.noreply.github.com>
Co-authored-by: Porras Huang <20535584+porrashuang@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: scoootscooob <167050519+scoootscooob@users.noreply.github.com>
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2026-06-11 22:17:35 -07:00 |
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wentian-byte
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b8142294b7
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[Bugfix] Restrict FlashInfer cuDNN FP8 ViT attention gate to Blackwell (SM 100) (#45251)
Signed-off-by: Wentian Byte <3400259131@qq.com>
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2026-06-11 16:39:24 +00:00 |
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wineandchord
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c2b4cd39ac
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[Doc][Attention] Fix MLA top-of-file comments (#37047)
Signed-off-by: wineandchord <guoqizhou19@gmail.com>
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2026-06-11 08:14:45 -07:00 |
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Harry Mellor
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03878d1c22
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Deprecations for v0.23 and v0.24 (#44992)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-11 14:35:38 +00:00 |
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Yufeng HeandWentao Ye
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1f60771c74
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fix: guard flash-attn rotary import (#42679)
Signed-off-by: Yufeng He <40085740+he-yufeng@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-06-11 08:43:31 -04:00 |
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qizixi
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e2db0222e9
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[Perf][Attention] Pin MLA chunked-context metadata tensors so H2D copies are truly non-blocking (#45074)
Signed-off-by: zixi-qi <zixi@inferact.ai>
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2026-06-10 15:56:49 -07:00 |
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Rohan PotdarandAndreas Karatzas
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5b6b536fdc
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[ROCm][Bugfix] Make intermediate_pad TP-aware in rocm_aiter_fused_experts (#44679)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-06-10 15:10:50 -05:00 |
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bnellnm
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29026682cb
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[Bugfix] Fix nemotron accuracy drop introduced by #41184 (#45037)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-06-10 13:16:25 -04:00 |
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Roberto L. Castro
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6850839c6f
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[Perf] Fix dsv3_router_gemm heuristic (#44217)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
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2026-06-10 06:08:41 -07:00 |
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Michael GoinandClaude
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87c15d46e3
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[Bugfix] Lazily import the humming quantization backend (#44921)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-06-10 06:06:17 -07:00 |
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Shantipriya Parida
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a1ec011a83
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[Bugfix] Add deepseek_v32 to Quark dynamic MXFP4 model type check (#39498)
Signed-off-by: Shantipriya Parida <shantipriya.parida@amd.com>
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2026-06-10 02:52:33 -07:00 |
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JartXandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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32daf56b42
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[Refactor] Rename rocm_moe.py to rocm_moe_rdna.py (#45011)
Signed-off-by: JartX <sagformas@epdcenter.es>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-10 17:02:09 +08:00 |
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xiaohuguo2023
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bb78168b21
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[ROCm][gpt-oss] Hybrid CDNA4 swizzle gate for A8W4 MoE (#44804)
Signed-off-by: Xiaohu Guo <Xiaohu.Guo@amd.com>
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2026-06-09 23:59:44 -07:00 |
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Fangzhou AiandvLLM Contributor
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01d8cd92dd
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[ROCm][Perf] Use fused softplus-sqrt-topk router under AITER fused-MoE (#44945)
Co-authored-by: vLLM Contributor <contributor@vllm.ai>
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2026-06-09 17:53:05 +00:00 |
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Jiangyun Zhu
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7a89b72564
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[Perf] fuse qk rmsnorm rope gate for qwen3.5 (#44176)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
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2026-06-09 22:12:17 +08:00 |
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