 TJian
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46f95b2ec2
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[ROCm][Critical] Fix the GDN import bug (#43486)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-23 21:12:58 +00:00 |
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Jee Jee Li
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ee05e8137e
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[Minor] Bigger overlap for FI AR (#43103)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-20 21:20:57 -07:00 |
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Rita Brugarolas
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bd9dbe6060
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[ROCm][Bugfix] Fix fused_mla_dual_rms_norm for AITER API rename _fused_qk_rmsnorm (#42606)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-05-15 14:50:03 -06:00 |
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TresandCursor
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f887aa1a53
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[Aiter][ROCm] RMSNormGated+GroupedQuantFP8 fusion (#40710)
Signed-off-by: Tres Popp <tres.popp@amd.com>
Signed-off-by: Tres Popp <trespopp@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-05-14 15:37:09 -04:00 |
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akii96
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74dffae666
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[ROCm] Run AITER RMSNorm pad fusion before AR RMS fusion (#42411)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-13 18:35:12 +08:00 |
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a721315488
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[ROCm][Perf] Fix RMSNorm+Quant fusion for gfx950 (non-fnuz) (#41825)
Signed-off-by: Frida Andersson <fanderss@amd.com>
Signed-off-by: Chuan Li <chuali@amd.com>
Co-authored-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Chuan Li <chuali@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Frida Andersson <frida-andersson@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-05-11 15:00:51 -04:00 |
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Rohan PotdarandElizaWszola
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a51376b3f0
|
[Performance][DSR1]: Fused RoPE+KVCache+q_concat for MLA (#40392)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
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2026-05-11 14:10:50 +00:00 |
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Wang XingranandHongjian Zhang
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0b272a6e01
|
[Bugfix] Fix SP pass for multimodal models and PP+SP residual handling (#33322)
Signed-off-by: Xingran Wang <wangxingran123456@outlook.com>
Signed-off-by: Hongjian Zhang <hirokenovo@gmail.com>
Co-authored-by: Hongjian Zhang <hirokenovo@gmail.com>
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2026-05-09 19:44:16 -07:00 |
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baonudesifeizhaiandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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bc5fdc1e6a
|
Add NVFP4 all-gather GEMM fusion for AsyncTP (#41882)
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-10 01:13:22 +00:00 |
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akii96
|
3af561ec0a
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[ROCm] Fix AITER AR+RMSNorm no-residual fusion (#41972)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-07 13:14:58 -07:00 |
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Andreas Karatzas
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003159d98b
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[ROCm][CI] Avoid duplicate ROCm AITER norm-quant patterns (#41534)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-05-07 06:33:30 -07:00 |
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Luka Govedič
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d58c42e19c
|
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-05-01 23:41:15 -04:00 |
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529c671e80
|
[ROCm][FEAT] AITER Fused Allreduce + RMSNorm (#37646)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
Signed-off-by: junkang1991 <junkangchow@gmail.com>
Co-authored-by: Rita Brugarolas <Rita.BrugarolasBrufau@amd.com>
Co-authored-by: junkang1991 <junkangchow@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-05-01 23:07:18 +08:00 |
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baonudesifeizhai
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c3868bbbe4
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[compile] Add FlashInfer FP8 async TP fusion and preserve allreduce fusion ordering #27893 (#39505)
Signed-off-by: baonudesifeizhai <baonudesifeizhai@gmail.com>
Signed-off-by: baonudesifeizhai <85092850+baonudesifeizhai@users.noreply.github.com>
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
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2026-05-01 05:08:34 +00:00 |
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32e45636e3
|
[torch.compile]: Disable Sequence Parallelism (SP) for piecewise compilation (#38373)
Signed-off-by: SouthWest7 <am1ao@qq.com>
Signed-off-by: Xinan Miao <1403572259@qq.com>
Co-authored-by: SouthWest7 <am1ao@qq.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Wang Xingran <72983099+wangxingran222@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-26 17:44:42 +00:00 |
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BadrBasowid
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2196bac135
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[Compilation] Refactor SiluMul activation+quant Fusion Pass (#39684)
Signed-off-by: BadrBasowid <badr.basowid@gmail.com>
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2026-04-23 09:10:36 -04:00 |
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Carl Yandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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4506319a28
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[compile] mla + group fp8 fusion (#38877)
Signed-off-by: Carl You <4531192+carlyou@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-21 23:16:58 -04:00 |
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Frederik Gossen
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87805fa11e
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[Core] Cache InductorPass.hash_source with functools.cache (#39328)
Signed-off-by: Frederik Gossen <frgossen@meta.com>
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2026-04-20 14:06:15 -04:00 |
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Rita Brugarolas
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fb5635d3f9
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[ROCm] Add MLA dual RMS norm fusion (Q, KV) pass for DeepSeek/Kimi-K2 (#39242)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-04-20 14:56:27 +00:00 |
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Kaicheng YangandClaude Sonnet 4.6
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4beeb0689c
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fused qknorm+rope kernel optimization for SM9.0 (#37376)
Signed-off-by: EricccYang <yangyang4991@gmail.com>
Signed-off-by: Kaicheng Yang <53411596+EricccYang@users.noreply.github.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-04-12 19:58:37 -07:00 |
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Jee Jee Li
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ecd1ea1363
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[Kernel] Porting the TRTLLM minimax_allreduce_rms kernels (#37045)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-04-11 00:20:20 +08:00 |
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Richard Zou
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f44afef6d6
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[compile] Allow strings in custom ops without regressing compilation times (#38123)
Signed-off-by: Richard Zou <zou3519@gmail.com>
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2026-04-10 07:26:37 +00:00 |
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Micah Williamson
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d5f75fdf50
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[ROCm] Correctly guard fused_silu_mul_block_quant on ROCm (#39387)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-04-09 17:59:03 +00:00 |
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Gregory Shtrasberg
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56c976c1b5
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[ROCm] Enable fused_silu_mul_block_quant on ROCm (#38817)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2026-04-08 11:23:32 -05:00 |
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Jiangyun ZhuandLuka Govedič
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8060bb0333
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[vLLM IR] rework gemma_rms_norm (#39014)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Signed-off-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-04-07 01:37:00 -07:00 |
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Carl YandClaude Opus 4.6
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1f5ec2889c
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[mla] Support fused FP8/NVFP4 output quantization in MLA attention (#35792) (#36205)
Signed-off-by: Carl You <4531192+carlyou@users.noreply.github.com>
Signed-off-by: Carl Y <4531192+carlyou@users.noreply.github.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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2026-04-02 21:16:11 -04:00 |
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Luka Govedič
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694449050f
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Fix multiline-format string for python 3.10 (#38739)
Signed-off-by: Luka Govedic <luka.govedic@gmail.com>
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2026-04-02 03:19:35 +00:00 |
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Monishver
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c09ad767cd
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Feature/silu block quant fusion v1 (#32996)
Signed-off-by: Monishver Chandrasekaran <monishverchandrasekaran@gmail.com>
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2026-04-01 18:50:43 +00:00 |
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40bb175027
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[vLLM IR] 1/N Implement IR skeleton and rms_norm op (#33825)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Xinyu Chen <xinyu1.chen@intel.com>
Signed-off-by: chzhang <chaojun.zhang@intel.com>
Signed-off-by: Luka Govedic <luka.govedic@gmail.com>
Co-authored-by: Xinyu Chen <xinyu1.chen@intel.com>
Co-authored-by: Chaojun Zhang <chaojun.zhang@intel.com>
Co-authored-by: Luka Govedič <ProExpertProg@h100-01.nemg-001.lab.rdu2.dc.redhat.com>
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2026-03-31 22:15:05 -04:00 |
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BadrBasowidandvllmellm
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077a9a8e37
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[torch.compile] Refactor Attention Quant Fusion Pass and Remove Boilerplate (#37373)
Signed-off-by: BadrBasowid <badr.basowid@gmail.com>
Co-authored-by: vllmellm <vllm.ellm@embeddedllm.com>
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2026-03-31 14:15:50 -04:00 |
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Mohammad Miadh Angkad
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61e381dcf0
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[Perf] Add SM 10.3 (B300/GB300) all-reduce communicator tuning (#37756)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
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2026-03-21 19:43:47 +00:00 |
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0140eafb15
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[Bug] Fix FlashInfer allreduce fusion workspace uninitialized error (#37461)
Signed-off-by: root <root@prenyx0169.a51.clusters.nvidia.com>
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Signed-off-by: <>
Co-authored-by: root <root@prenyx0169.a51.clusters.nvidia.com>
Co-authored-by: root <root@prenyx0042.a51.clusters.nvidia.com>
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2026-03-20 03:09:21 -04:00 |
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Terry Gao
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3e6a1e1686
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[Custom Ops] Add functional + out variant for scaled_fp4_quant (#34389)
Signed-off-by: tianrengao <terrygao87@gmail.com>
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2026-03-16 18:51:46 -04:00 |
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elvischenv
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7d6abdd022
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[Fix] Use torch.empty for output in attention+quant fusion (#31785)
Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
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2026-03-10 21:26:14 -07:00 |
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TJianandvllmellm
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fb7fdc49c4
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[ROCm] [CI] Add new fusion test cases that are relevant to vLLM IR Ops (#34307)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Co-authored-by: vllmellm <vllm.ellm@embeddedllm.com>
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2026-03-03 06:24:21 -08:00 |
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wangxiyuan
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510bc9e1df
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[Misc] Cleanup useless current_platform import (#35715)
Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
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2026-03-02 09:36:54 +00:00 |
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Rohan Potdar
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e3691988d0
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[ROCm]: fix aiter rope functionalization (#35533)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
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2026-02-27 22:42:30 +00:00 |
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Wang XingranandHongjian Zhang
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07bdabef03
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[Bugfix] Use 'sum' reduction instead of 'avg' in Async TP reduce-scatter (#33088)
Signed-off-by: Xingran Wang <wangxingran123456@outlook.com>
Signed-off-by: Hongjian Zhang <hirokenovo@gmail.com>
Co-authored-by: Hongjian Zhang <hirokenovo@gmail.com>
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2026-02-27 07:06:08 +00:00 |
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9d37941017
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[torch.compile] Sequence Parallelism threshold compile ranges (#28672)
Signed-off-by: jasonlizhengjian <jasonlizhengjian@gmail.com>
Signed-off-by: Jason Li <jasonlizhengjian@gmail.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-02-26 05:00:12 +00:00 |
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71dfce6aa6
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[Kernel] Refactor FlashInfer allreduce for mnnvl backend (#34109)
Signed-off-by: hjjq <50634613+hjjq@users.noreply.github.com>
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Co-authored-by: wzhao18 <wzhao18.sz@gmail.com>
Co-authored-by: Wei Zhao <51183510+wzhao18@users.noreply.github.com>
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2026-02-26 03:17:20 +00:00 |
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haosdent
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0788ff0a15
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[Bugfix] Gracefully disable AllReduceFusionPass on GPUs without multicast support (#35085)
Signed-off-by: haosdent <haosdent@gmail.com>
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2026-02-25 07:31:45 -08:00 |
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Rohan Potdar
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f38f8c9742
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[ROCm]: Enable customop and rope+kvcache fusion for AITER RoPE (#35180)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
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2026-02-25 04:36:40 +00:00 |
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2ff4e51152
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[ROCm] AITER fused RoPE+KVCache (#33443)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: charlifu <charlifu@amd.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
Co-authored-by: charlifu <charlifu@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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2026-02-23 19:06:00 -08:00 |
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ElizaWszolaandLuka Govedič
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a88b3be7c4
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[Bugfix] Fix quant RMS norm fusion for quantization with TMA-aligned scales (#33255)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-02-17 23:35:04 -08:00 |
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Charlie Fu
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bb9f97308d
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[torch.compile][Fusion] Fix attention fusion pass removing kv_udpate op. (#33945)
Signed-off-by: charlifu <charlifu@amd.com>
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2026-02-09 16:15:43 -05:00 |
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Mohammad Miadh Angkad
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d4f123cc48
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[Kernel] FlashInfer: switch allreduce fusion to unified API (#33985)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
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2026-02-09 15:43:24 +00:00 |
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Andreas Karatzas
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ab10d79855
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[ROCm][Bugfix] fix act_quant_fusion module import error (#34069)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-02-07 19:21:12 -08:00 |
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IkennaandLuka Govedič
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906077181b
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[Bugfix] Fix QK Norm+RoPE fusion pattern matching on B200+FP8 (#33967)
Signed-off-by: Ikenna <ikennachifo@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-02-07 02:27:33 +00:00 |
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Luka Govedič
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ac32e66cf9
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[torch.compile] Reorganize vllm/compilation and tests/compile (0/N for vLLM IR) (#33731)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: ProExpertProg <luka.govedic@gmail.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-02-06 04:19:49 -08:00 |
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