 xaguilar-amd
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09663abde0
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[ROCm][MLA] Fuse MLA q/kv RMSNorm + FP8 per-token quant in the FP8 attention path (#44977)
Signed-off-by: Xavier Aguilar <xavier.aguilarfruto@amd.com>
Signed-off-by: Xavier Aguilar <Xavier.AguilarFruto@amd.com>
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2026-07-02 13:00:41 +08:00 |
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Yejing LaiandKunshang Ji
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f651a8a9a4
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[XPU][UT]Enable ut qk_norm_rope_fusion (#42486)
Signed-off-by: Lai, Yejing <yejing.lai@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-01 07:38:03 +00:00 |
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Nick Hill
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4e07ca2c92
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[Core] Add VLLM_GPU_SYNC_CHECK env var (#44800)
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2026-06-26 08:24:33 -07:00 |
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Jeff (Junze) Maandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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fc61c6fc26
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[Perf] Enable + tune FlashInfer fused allreduce at world_size=16 on SM 10.3 (GB300) (#46392)
Signed-off-by: Jeff Ma <jeffjma@umich.edu>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-24 23:04:17 -07:00 |
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Mohammad Miadh Angkad
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d1a38c2762
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[Kernel][Performance] Add FlashInfer cutedsl NVFP4 GEMM backend (#42235)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
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2026-06-22 16:17:18 -04:00 |
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Tyler Michael SmithandClaude Opus 4.6
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e9de72fe6c
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[Bugfix] Guard model_config access in _log_compilation_config (#46198)
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
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2026-06-20 19:26:38 +00:00 |
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Ace Eldeib
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b4092176b9
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[Bugfix] Complete one-shot fused all-reduce PDL at end to avoid NaN (#45448)
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2026-06-18 00:54:39 +00:00 |
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Ting SUNandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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7b5d60cc37
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[Bugfix][V1] Clean up compiled-model bytecode hooks on VllmRunner exit (#45195)
Signed-off-by: Ting Sun <suntcrick@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 20:31:17 -07:00 |
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Thomas Parnell
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ebf3a6d705
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[Bugfix] Fix trtllm fused allreduce+rms_norm for transformers backend (#45307)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
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2026-06-16 08:34:27 +00:00 |
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Chaojun Zhang
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2725c84aae
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[XPU] Enable sequence parallel support for XPU (#38608)
Signed-off-by: chaojun-zhang <chaojun.zhang@intel.com>
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
Signed-off-by: Chaojun,Zhang <chaojun.zhang@intel.com>
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2026-06-14 19:26:46 -07:00 |
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Markus HartikainenandFrida Andersson
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80e2c4462d
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[ROCm][Compile] Fuse AR + RMSNorm + per-group FP8 quant (+ DSv3.2 indexer fan-out) (#42864)
Signed-off-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Frida Andersson <fanderss@amd.com>
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2026-06-09 12:06:56 +00:00 |
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Vadim Gimpelson
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67d3792d99
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[Bugfix] Fix Qwen3.5-FP8 nightly fail. Guard fused_add_rms_norm input/weight dtype mismatch in RMSNorm + quant fusion (#44694)
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2026-06-06 08:46:14 -04:00 |
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Mike GandMichael Gschwind
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2f27c9a150
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Preserve layout-changing clones (#44574)
Signed-off-by: Michael Gschwind <mgschwind@nvidia.com>
Co-authored-by: Michael Gschwind <mgschwind@nvidia.com>
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2026-06-05 20:45:24 -04:00 |
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akii96andmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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4200f62147
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[ROCm][GPT-OSS] Fuse RoPE + static Q FP8 quant on fused RoPE+KV path (#42832)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-05 16:22:19 -05:00 |
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Harry Mellor
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a80af24356
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Speed up docs build (#44635)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-05 14:51:44 +00:00 |
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QiliangCui2023
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9354fb1ba5
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[Bugfix][Compile] Guard per_token_group_fp8_quant lookup on non-CUDA platforms (#44476)
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2026-06-04 09:31:50 -04:00 |
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d0975a4b50
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[perf] Add gemma RMS AR fusion (#42646)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2026-06-04 01:33:59 -07:00 |
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Charlie Fu
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71df063c49
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Enable perf_token_group_quant/_C_stable_libtorch for ROCm (#42758)
Signed-off-by: charlifu <charlifu@amd.com>
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2026-06-02 23:23:28 -07:00 |
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liuzhenweiandKunshang Ji
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3f3e2702c2
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[XPU] Enable rms_norm/act quant fusions (#43963)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-02 16:14:41 +00:00 |
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pschlan-amd
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88f172188b
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[ROCm] Fix AITER RMSNormQuantFusion for Kimi-Linear (#44308)
Signed-off-by: Patrick Schlangen <pschlan@amd.com>
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2026-06-02 14:50:21 +00:00 |
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rasmith
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9769e2df2a
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[AMD][CI][BugFix] Fix Distributed Compile Unit Tests (2xH100-2xMI300) group (#43120)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
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2026-05-28 14:39:01 -07:00 |
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Jee Jee Li
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6e503868ca
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[Kernel] Porting fuse_minimax_qk_norm to manual fusion (#43410)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-26 13:16:03 -07:00 |
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TJian
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46f95b2ec2
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[ROCm][Critical] Fix the GDN import bug (#43486)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-23 21:12:58 +00:00 |
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Jee Jee Li
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ee05e8137e
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[Minor] Bigger overlap for FI AR (#43103)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-20 21:20:57 -07:00 |
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Jiangyun Zhu
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8a56da3845
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[Experimental] Breakable CUDA graph (#42304)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
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2026-05-16 22:04:12 +08:00 |
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Rita Brugarolas
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bd9dbe6060
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[ROCm][Bugfix] Fix fused_mla_dual_rms_norm for AITER API rename _fused_qk_rmsnorm (#42606)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-05-15 14:50:03 -06:00 |
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TresandCursor
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f887aa1a53
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[Aiter][ROCm] RMSNormGated+GroupedQuantFP8 fusion (#40710)
Signed-off-by: Tres Popp <tres.popp@amd.com>
Signed-off-by: Tres Popp <trespopp@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-05-14 15:37:09 -04:00 |
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akii96
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74dffae666
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[ROCm] Run AITER RMSNorm pad fusion before AR RMS fusion (#42411)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-13 18:35:12 +08:00 |
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a721315488
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[ROCm][Perf] Fix RMSNorm+Quant fusion for gfx950 (non-fnuz) (#41825)
Signed-off-by: Frida Andersson <fanderss@amd.com>
Signed-off-by: Chuan Li <chuali@amd.com>
Co-authored-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Chuan Li <chuali@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Frida Andersson <frida-andersson@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-05-11 15:00:51 -04:00 |
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Rohan PotdarandElizaWszola
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a51376b3f0
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[Performance][DSR1]: Fused RoPE+KVCache+q_concat for MLA (#40392)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
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2026-05-11 14:10:50 +00:00 |
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Wang XingranandHongjian Zhang
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0b272a6e01
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[Bugfix] Fix SP pass for multimodal models and PP+SP residual handling (#33322)
Signed-off-by: Xingran Wang <wangxingran123456@outlook.com>
Signed-off-by: Hongjian Zhang <hirokenovo@gmail.com>
Co-authored-by: Hongjian Zhang <hirokenovo@gmail.com>
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2026-05-09 19:44:16 -07:00 |
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baonudesifeizhaiandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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bc5fdc1e6a
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Add NVFP4 all-gather GEMM fusion for AsyncTP (#41882)
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-10 01:13:22 +00:00 |
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haosdent
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57c2f724c1
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[CI][Bugfix] Fix CI failures for "PyTorch Compilation Unit Tests" (#41940)
Signed-off-by: haosdent <haosdent@gmail.com>
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2026-05-07 19:42:00 -07:00 |
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akii96
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3af561ec0a
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[ROCm] Fix AITER AR+RMSNorm no-residual fusion (#41972)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-07 13:14:58 -07:00 |
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Andreas Karatzas
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003159d98b
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[ROCm][CI] Avoid duplicate ROCm AITER norm-quant patterns (#41534)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-07 06:33:30 -07:00 |
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Lucas Kabela
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213f10bfdd
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[Bugfix] Fix codegen for unqualified names (#40726)
Signed-off-by: Lucas Kabela <lucaskabela@meta.com>
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2026-05-06 01:11:37 -07:00 |
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Luka Govedič
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d58c42e19c
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[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-05-01 23:41:15 -04:00 |
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529c671e80
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[ROCm][FEAT] AITER Fused Allreduce + RMSNorm (#37646)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
Signed-off-by: junkang1991 <junkangchow@gmail.com>
Co-authored-by: Rita Brugarolas <Rita.BrugarolasBrufau@amd.com>
Co-authored-by: junkang1991 <junkangchow@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-05-01 23:07:18 +08:00 |
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baonudesifeizhai
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c3868bbbe4
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[compile] Add FlashInfer FP8 async TP fusion and preserve allreduce fusion ordering #27893 (#39505)
Signed-off-by: baonudesifeizhai <baonudesifeizhai@gmail.com>
Signed-off-by: baonudesifeizhai <85092850+baonudesifeizhai@users.noreply.github.com>
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
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2026-05-01 05:08:34 +00:00 |
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roikoren755
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c2fb013312
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[Bugfix][Compile] Fix gc.collect/empty_cache patch arity in CUDAGraphWrapper (#41235)
Signed-off-by: Roi Koren <roik@nvidia.com>
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2026-04-29 21:59:18 +00:00 |
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Laith Sakka
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6f20f81cbf
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Replace shape_invariants with simpler apprach in dynamic_arg_dims utilizing shape_id property. (#36194)
Signed-off-by: Laith Sakka <lsakka@meta.com>
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2026-04-29 18:32:15 +00:00 |
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Frederik Gossen
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a05848e255
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[Bugfix] Report compile time for in-memory cache hit path (#41023)
Signed-off-by: Frederik Gossen <frgossen@meta.com>
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2026-04-29 15:32:03 +00:00 |
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32e45636e3
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[torch.compile]: Disable Sequence Parallelism (SP) for piecewise compilation (#38373)
Signed-off-by: SouthWest7 <am1ao@qq.com>
Signed-off-by: Xinan Miao <1403572259@qq.com>
Co-authored-by: SouthWest7 <am1ao@qq.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Wang Xingran <72983099+wangxingran222@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-26 17:44:42 +00:00 |
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Richard Zou
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424033f4fc
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[Bugfix] Include inductor and functorch configs in compilation cache key (#40627)
Signed-off-by: Richard Zou <zou3519@gmail.com>
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2026-04-23 09:52:59 -04:00 |
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BadrBasowid
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2196bac135
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[Compilation] Refactor SiluMul activation+quant Fusion Pass (#39684)
Signed-off-by: BadrBasowid <badr.basowid@gmail.com>
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2026-04-23 09:10:36 -04:00 |
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Zhengxu Chen
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98a242ff61
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[compile] Skip FX graph deserialiaztion on loading, further reducing warm compile time. (#40151)
Signed-off-by: zhxchen17 <zhxchen17@fb.com>
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2026-04-23 13:43:18 +08:00 |
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Lucas Kabela
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0283f303d8
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[BE] Fix compile time message to be consistent (use monitoring) (#40641)
Signed-off-by: Lucas Kabela <lucaskabela@meta.com>
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2026-04-23 00:12:08 +00:00 |
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Wentao Yeandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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8f87eb4622
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[Refactor] Clean up log once scope="local" (#40540)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-04-22 16:42:43 -04:00 |
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Carl Yandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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4506319a28
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[compile] mla + group fp8 fusion (#38877)
Signed-off-by: Carl You <4531192+carlyou@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-21 23:16:58 -04:00 |
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Frederik Gossen
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87805fa11e
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[Core] Cache InductorPass.hash_source with functools.cache (#39328)
Signed-off-by: Frederik Gossen <frgossen@meta.com>
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2026-04-20 14:06:15 -04:00 |
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