 baonudesifeizhai
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c3868bbbe4
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[compile] Add FlashInfer FP8 async TP fusion and preserve allreduce fusion ordering #27893 (#39505)
Signed-off-by: baonudesifeizhai <baonudesifeizhai@gmail.com>
Signed-off-by: baonudesifeizhai <85092850+baonudesifeizhai@users.noreply.github.com>
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
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2026-05-01 05:08:34 +00:00 |
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Zhanda ZhuandYubo Gao
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5d5c776444
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[Perf] FP8 FlashInfer Attn for ViT (#38065)
Signed-off-by: Zhanda Zhu <zhandazhu@gmail.com>
Co-authored-by: Yubo Gao <ybgao-nvidia@users.noreply.github.com>
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2026-04-27 13:44:15 +08:00 |
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Vadim Gimpelson
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6d85b36a9f
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Revert #38730 and #38791 (#40032)
Signed-off-by: Vadim Gimpelson <vadim.gimpelson@gmail.com>
Signed-off-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
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2026-04-21 11:44:11 -04:00 |
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bai
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191e3fdaa1
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Update flashinfer to 0.6.8 (#39959)
Signed-off-by: bai <v@gor.io>
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2026-04-20 10:37:23 -07:00 |
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Maral
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2e9034c998
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[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (#33892)
Signed-off-by: maral <maralbahari.98@gmail.com>
Signed-off-by: Maral <maralbahari.98@gmail.com>
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2026-04-09 08:50:39 +08:00 |
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e8ebbdde83
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[Quantization] Add FlashInfer CuteDSL batched experts backend for NVFP4 MoE (#38251)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
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2026-04-06 11:57:53 -07:00 |
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Stefano Castagnetta
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6183cae1bd
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[Bugfix] Restrict TRTLLM attention to SM100, fixing GB300 (SM103) hang (#38730)
Signed-off-by: Stefano Castagnetta <scastagnetta@nvidia.com>
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2026-04-01 12:08:40 -07:00 |
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d9b90a07ac
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[MoE Refactor] Migrate Unquantized to Full Oracle Flow (#36286)
Signed-off-by: Yifan Zong <yzong@redhat.com>
Signed-off-by: Robert Shaw <robshaw@redhat.com>
Signed-off-by: yzong-rh <yzong@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Robert Shaw <robshaw@redhat.com>
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2026-03-31 15:43:33 -04:00 |
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Zhewen LiandZhewen Li
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be1a85b7a2
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Revert "[MoE Kernel] Flashinfer nvfp4 cutedsl moe kernel integration" (#38050) (#38169)
Co-authored-by: Zhewen Li <zhewenli@inferact.ai>
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2026-03-26 07:59:09 -07:00 |
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Yongye Zhu
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678b3c99e8
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[MoE Kernel] Flashinfer nvfp4 cutedsl moe kernel integration (#38050)
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2026-03-25 10:16:40 -07:00 |
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RanranandWentao Ye
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dc6908ac6a
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[Bugfix] Register VLLM_BATCH_INVARIANT in envs.py to fix spurious unknown env var warning (#35007)
Signed-off-by: Ranran <1012869439@qq.com>
Signed-off-by: Ranran <hzz5361@psu.edu>
Signed-off-by: ran <hzz5361@psu.edu>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-03-23 18:31:14 -04:00 |
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yzong-rh
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e85f8f0932
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[Bug][MoE] Strengthen _supports_current_device() checks in the TRTLLM FP8, NVFP4, and FlashInfer CuteDSL MoE experts (#36728)
Signed-off-by: Yifan Zong <yzong@redhat.com>
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2026-03-23 17:02:57 -04:00 |
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2754231ba3
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[Kernel] Add FlashInfer MoE A2A Kernel (#36022)
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Signed-off-by: Leo Tian <lctian@nvidia.com>
Co-authored-by: wzhao18 <wzhao18.sz@gmail.com>
Co-authored-by: Stefano Castagnetta <scastagnetta@nvidia.com>
Co-authored-by: root <root@lyris0267.lyris.clusters.nvidia.com>
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2026-03-15 23:45:32 -07:00 |
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97995f6376
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[MoE Refactor] Create MK for TRTLLM Kernels (#32564)
Signed-off-by: Robert Shaw <robshaw@redhat.com>
Signed-off-by: Robert Shaw <rshaw@neuralmagic.com>
Signed-off-by: Robert Shaw <robertgshaw2@gmail.com>
Co-authored-by: Robert Shaw <robshaw@redhat.com>
Co-authored-by: Robert Shaw <rshaw@neuralmagic.com>
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2026-03-03 10:39:50 -08:00 |
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Michael Goin
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4fec53cfcb
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[CI] Actually run tests/kernels/quantization/test_block_fp8.py in CI (#34274)
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2026-02-26 17:58:03 -07:00 |
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danisereb
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9609b1f18d
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Integrate flashinfer mm_mxfp8 in ModelOpt MXFP8 (#35053)
Signed-off-by: Daniel Serebrenik <daserebrenik@nvidia.com>
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2026-02-24 08:45:13 -07:00 |
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jiahanc
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59a5cb387a
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[perf] Integrate flashinfer concat_mla_k (#31171)
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2026-02-05 05:23:11 -05:00 |
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Roy Wang
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63c0889416
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[Misc] Fix flashinfer related tests (#33462)
Signed-off-by: esmeetu <jasonailu87@gmail.com>
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2026-01-31 16:10:24 -05:00 |
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Pavani Majety
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c3a9752b0c
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[Hardware][SM100] Add TRTLLM Kernel for INT4 W4A16 Kernel. (#32437)
Signed-off-by: Pavani Majety <pmajety@nvidia.com>
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2026-01-30 10:30:46 -08:00 |
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Linda
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0493d897c4
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[NVIDIA] [feat] Integrate flashinfer Trtllmgen bf16 moe (#32954)
Signed-off-by: Linda-Stadter <57756729+Linda-Stadter@users.noreply.github.com>
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2026-01-29 10:00:13 -08:00 |
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Roberto L. Castro
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8ef50d9a6b
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[Kernel][Performance] Enable smaller Scaling Factor tiling for NVFP4 small-batch decoding (#30885)
Signed-off-by: LopezCastroRoberto <roberto.lopez.castro@udc.es>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
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2026-01-13 15:22:53 -08:00 |
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shyeh25
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1c46dea001
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Revert "[Kernels][FI] Skip trtllm attention when num_kv_heads=1 (#308… (#31617)
Signed-off-by: shyeh25 <206795756+shyeh25@users.noreply.github.com>
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2026-01-10 12:39:59 -08:00 |
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Kate ChengandJhao-Ting Chen
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cc6dafaef2
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[Perf][Kernels] Enable FlashInfer DeepGEMM swapAB on SM90 (for W8A8 Linear Op) (#29213)
Signed-off-by: Kate Cheng <yunhsuanc@nvidia.com>
Signed-off-by: Jhao-Ting Chen <jhaotingc@nvidia.com>
Co-authored-by: Jhao-Ting Chen <jhaotingc@nvidia.com>
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2026-01-07 10:53:54 -05:00 |
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Ye (Charlotte) Qi
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a100152288
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[Kernels][FI] Skip trtllm attention when num_kv_heads=1 (#30842)
Signed-off-by: Ye (Charlotte) Qi <yeq@meta.com>
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2025-12-17 01:54:21 -08:00 |
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jiahanc
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254a7f8fd6
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[Perf] Do FP4 quant before All gather on flashinfer trtllmgen MOE (#30014)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
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2025-12-16 13:01:48 -08:00 |
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Roberto L. Castroandyoukaichao
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4fa7ce46f3
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[Feature] Add SM103 (Blackwell Ultra) Support to vLLM (#30484)
Signed-off-by: LopezCastroRoberto <robertol.c510@gmail.com>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Co-authored-by: youkaichao <youkaichao@gmail.com>
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2025-12-12 19:34:23 -08:00 |
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Po-Han Huang (NVIDIA)
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eea41804a4
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[bug] Fix "Current vLLM config is not set." warnings when FlashInfer attention is used (#30241)
Signed-off-by: Po-Han Huang <pohanh@nvidia.com>
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2025-12-10 11:18:51 -08:00 |
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66e674cdd5
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[Attention][UX][1/N] Add AttentionConfig and change attention env vars to CLI arguments (#26315)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
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2025-12-05 09:48:43 -08:00 |
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Shu WangandMichael Goin
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613abb50d5
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[MoE] Nvfp4 Masked Gemm: Add flashinfer grouped_gemm_nt_masked (#25990)
Signed-off-by: Shu Wang. <shuw@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-11-19 13:29:06 -08:00 |
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Vadim Gimpelson
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173b356abf
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[PERF] Remove TRTLLM Gen attn kernel limitation max_seq_len <=131072 (#28755)
Signed-off-by: Vadim Gimpelson <vadim.gimpelson@gmail.com>
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2025-11-15 15:43:41 +05:30 |
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4516d44b7f
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[DCP] Support Decode Context Parallel (DCP) for GQA with Flashinfer (#25438)
Signed-off-by: gaojc <1055866782@qq.com>
Signed-off-by: Jingchun Gao <gaojingchun1@huawei.com>
Signed-off-by: Jingchun Gao <63247409+gjc0824@users.noreply.github.com>
Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>
Co-authored-by: gaojingchun (A) <g00955623@china.huawei.com>
Co-authored-by: Jingchun Gao <gaojingchun1@huawei.com>
Co-authored-by: QiuChunshuo <qiuchunshuo@huawei.com>
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2025-11-14 11:24:10 +00:00 |
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Michael Goin
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a543e678b4
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[Bugfix] Fix SM100 gpt-oss regression due to faulty attn sink support (#28561)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-12 19:40:59 -07:00 |
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Xiaozhu MengandLu Fang
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4a36681f85
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[flashinfer][fix] do not check nvcc availability when using pre-downloaded cubins (#27990)
Signed-off-by: Xiaozhu <mxz297@gmail.com>
Co-authored-by: Lu Fang <30275821+houseroad@users.noreply.github.com>
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2025-11-07 22:25:21 -08:00 |
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Paul Zhang
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faedbb4d4f
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[Feature] Extend batch invariant torch.compile to B200 (#27856)
Signed-off-by: PaulZhang12 <paulzhan@fb.com>
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2025-11-05 10:04:49 -08:00 |
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Harry Mellor
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6c9fdbf725
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[Docs] Replace rst style double-backtick with md single-backtick (#27091)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-17 02:47:34 -07:00 |
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Harry Mellor
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8fcaaf6a16
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Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-12 09:51:31 -07:00 |
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Michael GoinandWentao Ye
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c9d33c60dc
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[UX] Add FlashInfer as default CUDA dependency (#26443)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-10-09 14:10:02 -07:00 |
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elvischenv
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44f633dba1
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[Flashinfer][gpt-oss] Support FP8-qkv Flashinfer TRTLLM Sinks Attention (#25674)
Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
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2025-10-09 16:13:39 -04:00 |
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roikoren755
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4069db3f2e
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[Bugfix] Enable padded FP4 quantization (#25947)
Signed-off-by: Roi Koren <roik@nvidia.com>
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2025-10-09 10:59:41 -07:00 |
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Benjamin Chislettandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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caf8b1c084
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[Bugfix] Fix MTP+FlashInfer crash when trtllm kernels are available but disabled (#26361)
Signed-off-by: Benjamin Chislett <bchislett@nvidia.com>
Signed-off-by: Benjamin Chislett <chislett.ben@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2025-10-07 22:12:26 +00:00 |
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fxmarty-amd
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41f1cf38f2
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[Feature][OCP MX] Support mxfp6 and mixed mxfp6-mxfp4 (#21166)
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2025-10-07 09:35:26 -04:00 |
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Jason Li
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6b6e98775f
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[NVIDIA] flashinfer TRTLLM attention prefill token limit (#25998)
Signed-off-by: jasonlizhengjian <jason.li@centml.ai>
Signed-off-by: jasonlizhengjian <jasonlizhengjian@gmail.com>
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2025-10-05 14:24:37 -06:00 |
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Harry Mellor
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1c0c68202c
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Fix per file ruff ignores related to typing (#26254)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-05 16:37:55 +00:00 |
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Harry Mellor
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d6953beb91
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Convert formatting to use ruff instead of yapf + isort (#26247)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-05 07:06:22 -07:00 |
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54e42b72db
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Support mnnvl all2allv from Flashinfer (#21003)
Signed-off-by: Shu Wang <shuw@nvidia.com>
Signed-off-by: Shu Wang. <shuw@nvidia.com>
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
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2025-09-24 14:38:16 -04:00 |
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Benjamin Chislettandlhsjohn
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c30b405b8f
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[Spec Decode] Enable FlashInfer Spec Decoding (#25196)
Signed-off-by: Benjamin Chislett <benjamin.chislett@centml.ai>
Signed-off-by: Benjamin Chislett <bchislett@nvidia.com>
Co-authored-by: lhsjohn <huashuoli@tencent.com>
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2025-09-23 22:29:58 -04:00 |
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elvischenvandMichael Goin
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e67a79db03
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[Bugfix] Refactor Flashinfer TRTLLM attention kernel selection logic (#24600)
Signed-off-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-09-17 15:36:29 -07:00 |
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Xiaozhu Meng
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e42af78b18
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[flashinfer] [kernel] support for fp8 kv cache for trtllm prefill attention (#24197)
Signed-off-by: Xiaozhu <mxz297@gmail.com>
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2025-09-11 14:20:09 -07:00 |
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nvjullinandMichael Goin
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f66673a39d
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[Kernel] Added flashinfer fp8 per-tensor gemms (#22895)
Signed-off-by: Julien Lin <jullin@nvidia.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-08-26 06:54:04 -07:00 |
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Shiyan Deng
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da65bec309
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add an env var for path to pre-downloaded flashinfer cubin files (#22675)
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2025-08-22 19:25:45 +00:00 |
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