 Harry MellorandClaude Opus 5
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651a88c09a
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[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 10:57:24 -07:00 |
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Harry MellorandClaude Opus 5
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8c1557a79c
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Add pydocstyle to the ruff rules (#52136)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: Harry Mellor <hej.mellor@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 16:44:29 +00:00 |
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ab35354c21
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[ROCm][AITER] Skip AITER norm kernels when flattening to 2D would copy (#55991)
Signed-off-by: Zheng Gong <zgong@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-09-16 07:26:56 +00:00 |
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78e84261ab
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[Performance] Add Triton kernel for Gemma3n sparse GELU (#48498)
Signed-off-by: BWAAEEEK <jooho414@gmail.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
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2026-09-14 07:42:15 +00:00 |
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djramic
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21a117ad87
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[CI][IR] Speed up vLLM IR test group (#55965)
Signed-off-by: Djordje Ramic <djoramic@amd.com>
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2026-09-08 21:28:06 -05:00 |
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Oxana KorzhandClaude Opus 5
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1a16c2ad2c
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[CI][Test] Deflake the rms_norm scaling-property assertions (#54271)
Signed-off-by: Oxana Korzh <okorzh@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-29 08:08:20 +08:00 |
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Chaojun ZhangandKunshang Ji
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482cfc20f0
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[XPU] Unify XPU RMSNorm kernels with vllm_c and drop redundant XPU-specific implementation (#46981)
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-31 17:28:18 +08:00 |
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Andreas Karatzas
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49f31d7cee
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[ROCm] Make vllm_c RMSNorm output contiguous (#49913)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-26 23:59:14 -05:00 |
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Andreas Karatzas
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2ac125123a
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[CI] Use explicit devices in IR tests (#49513)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
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2026-07-23 20:08:14 -07:00 |
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Andreas Karatzas
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d28bdf9344
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[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (#41577)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-23 04:31:32 +00:00 |
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Luka Govedič
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d58c42e19c
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[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-05-01 23:41:15 -04:00 |
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fe5c115ee4
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[vLLM IR] Add IR op testing and benchmarking infrastructure (#40167)
Signed-off-by: Yanan Cao <gmagogsfm@gmail.com>
Co-authored-by: Theresa Shan <Theresa.Shan@amd.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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2026-04-21 00:23:03 +00:00 |
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40bb175027
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[vLLM IR] 1/N Implement IR skeleton and rms_norm op (#33825)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Xinyu Chen <xinyu1.chen@intel.com>
Signed-off-by: chzhang <chaojun.zhang@intel.com>
Signed-off-by: Luka Govedic <luka.govedic@gmail.com>
Co-authored-by: Xinyu Chen <xinyu1.chen@intel.com>
Co-authored-by: Chaojun Zhang <chaojun.zhang@intel.com>
Co-authored-by: Luka Govedič <ProExpertProg@h100-01.nemg-001.lab.rdu2.dc.redhat.com>
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2026-03-31 22:15:05 -04:00 |
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