6 Commits

Include renames

Author	SHA1	Message	Date
Li, Jiangandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>	8311f083bd	[Bugfix][CPU] Fix thread num for shared memory communication (#33317) ... Signed-off-by: jiang1.li <jiang1.li@intel.com> Signed-off-by: Li, Jiang <bigpyj64@gmail.com> Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>	2026-01-29 03:26:58 -08:00
Fadi Arafeh	744ef30484	[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792) ... Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>	2026-01-22 18:55:23 +00:00
Li, Jiang	7f829be7d3	[CPU] Refactor CPU attention backend (#27954) ... Signed-off-by: jiang1.li <jiang1.li@intel.com>	2025-11-12 09:43:06 +08:00
Li, Jiang	a15a50fc17	[CPU] Enable shared-memory based pipeline parallel for CPU backend (#21289) ... Signed-off-by: jiang1.li <jiang1.li@intel.com>	2025-07-21 09:07:08 -07:00
Li, Jiang	6cc1e7d96d	[CPU] Update custom ops for the CPU backend (#20255) ... Signed-off-by: jiang1.li <jiang1.li@intel.com>	2025-07-01 07:25:03 +00:00
Li, Jiang	550b2801ad	[CPU][Bugfix] Using custom allreduce for CPU backend (#15934) ... Signed-off-by: jiang1.li <jiang1.li@intel.com>	2025-04-02 07:46:47 -07:00