 zofia
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9bdb06b436
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[XPU][6/N] add xpu scaled_mm kernel (#34117)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
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2026-02-09 20:17:35 +08:00 |
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zofia
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2ce9fe4ad0
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[XPU][5/N] add wna16 xpu kernel (#33973)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
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2026-02-06 15:59:53 +00:00 |
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Fadi Arafeh
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f79d9dce16
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[CPU][BugFix] Fix loading of w8a8int models with bias (#33582)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-02-06 11:59:20 +00:00 |
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Hashem Hashemi
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d5c4800112
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Adds padding and perf improvements to wvSplitK_fp8 (#33527)
Signed-off-by: Hashem Hashemi <hashem.hashemi@amd.com>
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2026-02-05 22:16:02 +00:00 |
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Fadi Arafeh
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fd03538bf9
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[CPU][BugFix] Allow w8a8 oneDNN quantized matmul to support 3D inputs (#33727)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-02-05 06:26:09 +00:00 |
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f68e3ea4e1
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[BugFix] Add synchronize in CutlassW4A8LinearKernel to ensure data is ready for use. (#33078)
Co-authored-by: jinwuguo <jinwuguo@tencent.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-01-31 08:14:54 +00:00 |
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Fadi Arafeh
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1618e25492
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[CPU][Feat] Enable KleidiAI accelerated int4 dynamic quant with BF16 activations on Arm CPUs (#33122)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-31 07:16:22 +00:00 |
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Matthias GehreandCursor
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73419abfae
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[Bugfix] Handle Asym W4A16 (ConchLinearKernel) for CT (#33200)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-01-31 06:21:51 +00:00 |
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Gregory Shtrasberg
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31aedfe7d6
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[Bugfix][ROCm] Fixing the skinny gemm dispatch logic from #32831 (#33366)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2026-01-30 19:05:23 -06:00 |
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zofia
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a5aa4d5c0f
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[Quantization][Refactor] use platform dict to choose kernel (#33130)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Signed-off-by: zofia <110436990+zufangzhu@users.noreply.github.com>
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2026-01-29 10:44:58 +00:00 |
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Didier Durandandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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31b25f6516
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[Doc]: fixing multiple typos in diverse files (#33256)
Signed-off-by: Didier Durand <durand.didier@gmail.com>
Signed-off-by: Didier Durand <2927957+didier-durand@users.noreply.github.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-01-29 16:52:03 +08:00 |
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Angela Yi
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07ea184f00
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[ez] Delete more torch version checks <= 2.8 (#33288)
Signed-off-by: angelayi <yiangela7@gmail.com>
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2026-01-29 05:28:46 +00:00 |
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Robert ShawandRobert Shaw
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247d1a32ea
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[Quantization][Deprecation] Remove BitBlas (#32683)
Signed-off-by: Robert Shaw <robshaw@redhat.com>
Signed-off-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Robert Shaw <robshaw@redhat.com>
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2026-01-28 11:06:22 +00:00 |
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Harry Mellor
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2eb673a088
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Add flake8-implicit-str-concat rules to Ruff (#33191)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-01-28 04:56:10 +00:00 |
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vllmellm
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148117ea2e
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[Refactor] Make FP8 Linear Ops use kernel abstraction (#27814)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2026-01-20 14:48:20 +08:00 |
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Matt
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bde57ab2ed
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[Hardware][AMD][CI][Bugfix] Fix AMD Quantization test group (#31713)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-01-10 23:19:46 -08:00 |
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weiyu
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e7596371a4
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[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)
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2026-01-07 16:07:16 +08:00 |
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Li, Jiangandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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8becf146bd
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[Quantization][Refactor] Move CPU GPTQ kernel into MP linear (#31801)
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Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-01-06 19:10:18 +00:00 |
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Jinzhen Lin
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de08b8f61b
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[Quantization] enable compressed-tensors marlin support for turing (#31000)
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2025-12-18 20:29:48 -08:00 |
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Didier DurandandWentao Ye
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1a55cfafcb
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[Doc]: fixing typos in various files (#30540)
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Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-12-14 02:14:37 -08:00 |
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shivampr
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cd7740ac5c
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[ROCm] Enable Triton ScaledMM fallback + kernel selection fix (#26668)
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2025-12-12 13:28:20 -05:00 |
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czhu-cohere
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f6227c22ab
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[Kernel]Support W4A8 Grouped GEMM on Hopper (#29691)
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2025-12-08 19:29:06 -08:00 |
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Yi Liu
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0d8a7d8a26
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[Compressed Tensors] Add XPU wNa16 support (#29484)
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2025-12-05 22:02:09 +08:00 |
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1656ad3704
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[Kernel][Quantization] add w4a8 support for marlin kernel (#24722)
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Co-authored-by: Michael Goin <mgoin@redhat.com>
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2025-11-29 07:19:33 -08:00 |
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vllmellm
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d8140b9833
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[ROCM] Fix ROCm warnings, environment flag access, and GEMM kernel naming for consistency in _aiter_ops.py (#28464)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2025-11-12 21:46:57 +00:00 |
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vllmellmandLuka Govedič
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f080a83511
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[RFC][ROCm][AITER] Keep all AITER kernels in _aiter_ops class like _custom_ops and _ipex_ops (#24490)
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Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2025-11-10 08:20:53 -08:00 |
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Xiangyu Li
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5cc6bddb6e
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[Kernel] Add GPTQv2 format support for low-bit or asymmetric quantization, by adapting gptq_gemm (#26092)
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2025-10-23 23:26:13 -04:00 |
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Isotr0py
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6ac5e06f7c
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[Chore] Clean up pytorch helper functions in vllm.utils (#26908)
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2025-10-18 09:48:22 -07:00 |
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Harry Mellor
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8fcaaf6a16
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Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-12 09:51:31 -07:00 |
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+151
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241b4cfe66
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[Refactor] Refactor FP8 & INT8 Quant Folder inside w8a8 (#25293)
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2025-10-08 10:20:48 -04:00 |
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Harry Mellor
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d6953beb91
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Convert formatting to use ruff instead of yapf + isort (#26247)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-05 07:06:22 -07:00 |
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Harry Mellor
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61aedb5ffe
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MoveVllmConfig from config/__init__.py to config/vllm.py (#25271)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-09-29 19:49:49 -07:00 |
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Michael Goin
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7361ab379f
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Remove redundant mutates_args and dispatch_key for direct_register_custom_op (#25512)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-09-23 22:48:40 +00:00 |
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ccee371e86
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[Docs] Fix warnings in mkdocs build (continued) (#24092)
Signed-off-by: Zerohertz <ohg3417@gmail.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-09-10 06:23:28 -07:00 |
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czhu-cohere
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2c2b140ae8
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[quantization] use channel scales for w4a8 + misc fixes (#23570)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-08-26 18:23:23 -07:00 |
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czhu-cohere
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e76e233540
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[kernel] Support W4A8 on Hopper (#23198)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-08-24 06:18:04 +00:00 |
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Li, Jiang
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7be5d113d8
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[CPU] Refactor CPU W8A8 scaled_mm (#23071)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-08-21 09:34:24 +08:00 |
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+105
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33c63e9547
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[Kernel] [Quantization] Add MXFP4 and bias support for marlin kernel (#22428)
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Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Gregory Shtrasberg <156009573+gshtras@users.noreply.github.com>
Co-authored-by: tlipoca9 <160737620+tlipoca9@users.noreply.github.com>
Co-authored-by: elvischenv <219235043+elvischenv@users.noreply.github.com>
Co-authored-by: wang.yuqi <noooop@126.com>
Co-authored-by: Benji Beck <benjibeck@meta.com>
Co-authored-by: youkaichao <youkaichao@gmail.com>
Co-authored-by: Siyuan Liu <lsiyuan@google.com>
Co-authored-by: Benjamin Chislett <chislett.ben@gmail.com>
Co-authored-by: LiuXiaoxuanPKU <lilyliupku@gmail.com>
Co-authored-by: simon-mo <xmo@berkeley.edu>
Co-authored-by: Chen Zhang <zhangch99@outlook.com>
Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com>
Co-authored-by: Minseok Lee <47620120+minseokl@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
Co-authored-by: Zhang Jason <ning.zhang2@amd.com>
Co-authored-by: Asaf Joseph Gardin <39553475+Josephasafg@users.noreply.github.com>
Co-authored-by: asafg <asafg@ai21.com>
Co-authored-by: Lain <siyuanf@nvidia.com>
Co-authored-by: tc-mb <157115220+tc-mb@users.noreply.github.com>
Co-authored-by: imning3 <hbning@pku.edu.cn>
Co-authored-by: Maximilien de Bayser <mbayser@br.ibm.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Tao He <linzhu.ht@alibaba-inc.com>
Co-authored-by: qscqesze <qingjun@minimaxi.com>
Co-authored-by: Syed Muhammad Bin Asif <92625830+syedmba@users.noreply.github.com>
Co-authored-by: Lionel Villard <villard@us.ibm.com>
Co-authored-by: WeiQing Chen <40507679+david6666666@users.noreply.github.com>
Co-authored-by: ycyaw66 <497410282@qq.com>
Co-authored-by: Moritz Sanft <58110325+msanft@users.noreply.github.com>
Co-authored-by: Ming Yang <minos.future@gmail.com>
Co-authored-by: Adrián García García <adrigarvk8@gmail.com>
Co-authored-by: Michael Goin <mgoin@redhat.com>
Co-authored-by: JaceyShao <65159281+JaceyShao@users.noreply.github.com>
Co-authored-by: shaojunqi <shaojunqi.sjq@alibaba-inc.com>
Co-authored-by: Ricardo Decal <crypdick@users.noreply.github.com>
Co-authored-by: Andrew Chan <andrewkchan.akc@gmail.com>
Co-authored-by: fxmarty-amd <felmarty@amd.com>
Co-authored-by: Andrew Sansom <andrew@protopia.ai>
Co-authored-by: Zhiyu <zhiyuc@nvidia.com>
Co-authored-by: Shu Wang <shuw@nvidia.com>
Co-authored-by: XIn Li <xinli@nvidia.com>
Co-authored-by: Junhao Li <streaver91@gmail.com>
Co-authored-by: Chauncey <chaunceyjiang@gmail.com>
Co-authored-by: iAmir97 <71513472+iAmir97@users.noreply.github.com>
Co-authored-by: iAmir97 <Amir.balwel@embeddedllm.com>
Co-authored-by: Hong Hanh <hanh.usth@gmail.com>
Co-authored-by: Daniel Serebrenik <74646983+pliops-daniels@users.noreply.github.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Guy Stone <guys@spotify.com>
Co-authored-by: yyweiss <70619747+yyweiss@users.noreply.github.com>
Co-authored-by: Pradyun92 <142861237+Pradyun92@users.noreply.github.com>
Co-authored-by: Pradyun Ramadorai <pradyunr@amazon.com>
Co-authored-by: Nicolò Lucchesi <nicolo.lucchesi@gmail.com>
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2025-08-14 11:23:22 -07:00 |
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Syed Muhammad Bin Asif
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609b533cb6
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[Bugfix] Add proper comparison for package versions (#22314)
Signed-off-by: Syed Muhammad Bin Asif <syedmba7@connect.hku.hk>
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2025-08-06 20:31:03 -07:00 |
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Nikhil Guptaandmgoin
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89ac266b26
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[Feat]: Add support for Dynamic Quant 4 bit CPU kleidiai kernels (#17112)
Signed-off-by: Nikhil Gupta <nikhil.gupta2@arm.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-07-28 20:55:15 +00:00 |
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Michael Goin
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28a6d5423d
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[Bugfix] Fix Machete zero point issue for GPTQ models on SM90 (#21066)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-07-16 19:54:45 -07:00 |
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XiongfeiWei
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d4170fad39
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Use w8a8 quantized matmul Pallas kernel (#19170)
Signed-off-by: Xiongfei Wei <isaacwxf23@gmail.com>
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2025-07-15 03:06:33 +00:00 |
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TJian
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80d38b8ac8
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[V1] [ROCm] [AITER] Upgrade AITER to commit 916bf3c and bugfix APIs (#20880)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2025-07-13 15:19:32 +00:00 |
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Michael Goin
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6e2c176e1f
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[Bugfix] Restrict Machete to only run on Hopper (#20830)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-07-12 17:34:40 +00:00 |
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Jacob Manning
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bf03ff3575
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[Kernel] Add Conch backend for mixed-precision linear layer (#19818)
Signed-off-by: Jacob Manning <jmanning+oss@stackav.com>
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2025-07-09 13:17:55 -07:00 |
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czhu-cohere
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3abfe22154
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Enable group size 64 for Machete (#20290)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-07-01 18:05:44 -07:00 |
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czhu-cohere
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9909726d2a
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Enable ZP Support for Machete (#20268)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-07-01 07:12:20 +00:00 |
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Simon Mo
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02f0c7b220
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[Misc] Add SPDX-FileCopyrightText (#19100)
Signed-off-by: simon-mo <simon.mo@hey.com>
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2025-06-03 11:20:17 -07:00 |
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Harry Mellor
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6223dd8114
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Update deprecated type hinting in model_executor/layers (#18056)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-05-13 04:17:23 -07:00 |
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Jinzhen Lin
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1d0c9d6b2d
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[Kernel] some optimizations for dense marlin and moe marlin (#16850)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-05 09:39:30 -07:00 |
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