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3207e7680e
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[XPU][MoE] Add WNA16 oracle backend for GPTQ sym-int4 (xpu_fused_moe) (#41426)
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-28 16:30:48 +00:00 |
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Matthias Gehre
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a9ec46d4b7
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[ROCm][Perf] Support N=5 in wvSplitK skinny GEMM kernels for speculative decoding (#40687)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
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2026-05-28 16:28:21 +00:00 |
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MajidandMajid Taheri Andani
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c08ebebf30
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[Perf] Add do_not_specialize to Mamba SSD chunk kernels (#43803)
Signed-off-by: Majid Taheri Andani <tahemaji@amazon.com>
Co-authored-by: Majid Taheri Andani <tahemaji@amazon.com>
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2026-05-28 15:40:02 +00:00 |
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Li, Jiang
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20d69d100a
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[CPU] Migrate cpu_awq into awq_marlin (#43841)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-05-28 22:36:31 +08:00 |
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zexplorerhjandhaojiangzheng
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f3b2a819f7
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[Perf][KDA] Fuse gate softplus, chunk-local cumsum, and RCP_LN2 scaling (#43667)
Signed-off-by: haojiangzheng <justineric096@gmail.com>
Co-authored-by: haojiangzheng <justineric096@gmail.com>
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2026-05-28 13:47:08 +00:00 |
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Wentao Ye
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64e1218673
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[Perf] Optimize moe permute by pre-allocate buffer, 9~14% kernel performance improvement (#43014)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-05-28 06:18:26 -07:00 |
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TJian
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0ba46d4b11
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[ROCm][DSV4] Enable Tilelang MHC replacing torch/triton mhc (#43679)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-28 07:05:28 +00:00 |
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Thien Tran
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e54eff769d
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[Bugfix] Pass routed_scaling_factor to FlashInfer TRTLLM BF16 MoE (#43769)
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2026-05-27 21:29:14 -07:00 |
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Yongye Zhu
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2d2c660104
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[MoE] Remove inplace fused experts mechanism (#43727)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-05-27 20:00:19 -07:00 |
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amitz-nv
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381edde1b9
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[Bugfix][Kernel] TRTLLM NVFP4 MoE chunking (#43599)
Signed-off-by: amitz-nv <203509407+amitz-nv@users.noreply.github.com>
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2026-05-28 00:36:21 +00:00 |
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Minh VuandWentao Ye
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206b72c982
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[Quantization] Fix Humming RoutedExperts import (#43540)
Signed-off-by: Minh Vu <vuhoangminh97@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-05-27 10:51:56 -07:00 |
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jatseng-ai
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05c50c721e
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[ROCm] mori: add InterNodeV1LL inter-node kernel selection via VLLM_MORI_INTERNODE_KERNEL (#41751)
Signed-off-by: jatseng-ai <jatseng@amd.com>
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2026-05-28 00:33:32 +08:00 |
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akii96
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de12f5ca0b
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[ROCm][GPT-OSS] Avoid repeated compile-time cos_sin_cache.to(bf16) casts in rotary path (#42833)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-27 16:22:27 +08:00 |
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Nico Holmberg
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7b54690244
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[ROCm][Perf] Expose AITER MoE sorting dispatch policy via env var (#39177)
Signed-off-by: nholmber <nholmber@users.noreply.github.com>
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2026-05-27 13:11:02 +08:00 |
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Andreas Karatzas
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5bdb181df5
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[ROCm][CI] Fix ROCm multimodal Qwen2.5-VL activation compile and Phi4MM ragged image mask handling (#43647)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-26 19:53:34 -07:00 |
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Jee Jee Li
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6e503868ca
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[Kernel] Porting fuse_minimax_qk_norm to manual fusion (#43410)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-26 13:16:03 -07:00 |
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Wei-Ming Chen
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6f5b533241
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Add LM head quantization support for ModelOpt (#42124)
Signed-off-by: weimingc <17592131+meenchen@users.noreply.github.com>
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2026-05-26 09:21:05 -07:00 |
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bnellnmandRobert Shaw
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f51bbc694d
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[MoE Refactor] W4a8 int8 oracle (#42789)
Signed-off-by: Bill Nell <bnell@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-05-26 11:15:42 -04:00 |
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bnellnmandRobert Shaw
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b226ddacfd
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[MoE Refactor] Migrate ModelOptMxFp8FusedMoE to oracle (#42768)
Signed-off-by: Bill Nell <bnell@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-05-26 11:14:14 -04:00 |
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Mohammad Miadh Angkad
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a970fb5a1a
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Fix CuPy runtime deps and restore humming (#43530)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
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2026-05-26 05:59:40 -07:00 |
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Hank_
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b3269454b1
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[chores][log] change registry log from warning to debug (#43045)
Signed-off-by: Hank <hcc.mayday@gmail.com>
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2026-05-26 00:13:46 -07:00 |
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Thien Tran
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d56612c621
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[GDN] GDN Prefill kernel for SM100 (#43273)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-05-26 14:02:11 +08:00 |
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Jee Jee Li
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ec5de7fa7d
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[LoRA] Add one shot triton kernel For MoE LoRA (#42290)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-05-25 19:47:04 -07:00 |
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Jee Jee Li
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d4004455d2
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[Kernel] Remove NormGateLinear (#43554)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-25 09:49:19 +00:00 |
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weizhoublue
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6cbe448eed
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fix: MoE model using shared routed experts crashes on AMD GPUs (#42373)
Signed-off-by: weizhou.lan@daocloud.io <weizhou.lan@daocloud.io>
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2026-05-25 12:03:05 +08:00 |
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Jee Jee Li
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b06813e872
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[Kernel] Add mhc_pre_big_fuse_with_norm_tilelang (#43474)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-25 01:19:45 +00:00 |
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daniserebandBanani Ghosh
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d56285c747
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Tuning script and configs for Triton Mamba SSU kernel (#43083)
Signed-off-by: Banani Ghosh <bg2502@nyu.edu>
Signed-off-by: Daniel Serebrenik <daserebrenik@nvidia.com>
Co-authored-by: Banani Ghosh <bg2502@nyu.edu>
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2026-05-24 20:12:44 +03:00 |
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TJian
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1806d1adfc
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[ROCm] [DSv4] [Perf] Support DeepSeek v4 MTP (#43385)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-24 18:43:08 +08:00 |
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Michael Goin
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10d264a2b9
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Revert "[Misc] add humming to dependencies" (#43492)
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2026-05-23 14:21:13 -07:00 |
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Siddharth BedekarandOpenAI Codex
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4438b6e7dc
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[MoE] Migrate W4A8 CT to oracle kernel setup (#42680)
Signed-off-by: Siddharth Bedekar <bedeksid@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-05-23 13:56:01 -04:00 |
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Wei-Ming Chen
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09a219c075
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[ModelOpt] Support Qwen3.5/3.6 VLM quantized prefix mapping (#42546)
Signed-off-by: weimingc <17592131+meenchen@users.noreply.github.com>
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2026-05-23 06:23:31 +00:00 |
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Taneem Ibrahim
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3a1c062151
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[Misc] Added missing return type annotations to improve mypy and IDE tooling (#43383)
Signed-off-by: Taneem Ibrahim <taneem.ibrahim@gmail.com>
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2026-05-23 13:28:22 +08:00 |
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Qiming ZhangandKunshang Ji
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54d153637b
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[XPU] reudce host overhead of XPU MOE (#42915)
Signed-off-by: mayuyuace <qiming1.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-23 13:09:34 +08:00 |
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Ma JianandKunshang Ji
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a5bbd81e2e
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[XPU]feat: enable FP8 block-scaled quantization on XPU (#42952)
Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-23 12:33:18 +08:00 |
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Andreas Karatzas
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d28bdf9344
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[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (#41577)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-23 04:31:32 +00:00 |
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Itay Alroy
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6d30655b13
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elastic_ep: stage/commit MoE quant method on reconfigure (#40881)
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
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2026-05-22 18:57:26 -04:00 |
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Ma JianandKunshang Ji
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8de5cabeb7
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[XPU]fix: add XPU platform guards to DeepSeek-V4 ops (#42950)
Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-23 06:29:45 +08:00 |
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Juhi Mittal
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e203006a8b
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[Quantization][ModelOpt] W4A16 NVFP4 fused MoE + mixed-precision dispatch (#42566)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
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2026-05-22 20:51:49 +00:00 |
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haosdentandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
4e597b7491
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[Bugfix] Clear error message for FP8 torchao quantization on unsupported GPUs (#36854)
Signed-off-by: haosdent <haosdent@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-22 20:09:17 +00:00 |
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Artem Perevedentsev
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23f7b11bf4
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[Bugfix] Detect wrong libcute_dsl_runtime.so variant in FlashInfer GDN (#43427)
Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com>
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2026-05-22 19:33:33 +00:00 |
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sychen52
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fb21d8b4f9
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Add NVFP4 MOE support for Deepseek V4. (#42209)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-05-22 07:21:51 -07:00 |
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b3c7ffcab8
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[Misc] Replace assert with proper exceptions for security and validation in pooling (#43286)
Signed-off-by: Taneem Ibrahim <taneem.ibrahim@gmail.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
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2026-05-22 18:43:33 +08:00 |
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Ma JianandKunshang Ji
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d3d1cf6972
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[XPU]feat: add XPU fallback for MoE topk routing and MXFP4 backend (#42951)
Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-22 10:22:45 +00:00 |
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wangxiyuan
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7e1b45a092
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[Attention] Mamba attention module refactor (#41126)
Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
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2026-05-22 17:13:12 +08:00 |
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Xiaochang WuandKunshang Ji
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8c8b1825eb
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[XPU] Enable multiple key kernels for sparse attention (#37888)
Signed-off-by: Xiaochang Wu <xiaochang.wu@intel.com>
Signed-off-by: Wu, Xiaochang <xiaochang.wu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-05-22 12:02:51 +08:00 |
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Chengze FanandLu Fang
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2998a047aa
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[Bugfix] Fix DSV4 Base model swiglu limit issue in FP8 path (#42855)
Signed-off-by: Chengze Fan <chengze@meta.com>
Signed-off-by: Chengze Fan <fancz2002@gmail.com>
Co-authored-by: Lu Fang <30275821+houseroad@users.noreply.github.com>
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2026-05-21 19:43:01 -07:00 |
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Wentao Ye
|
b29cbf0652
|
[Perf] zeros -> empty to remove additional fill (#42988)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-05-21 16:00:29 -04:00 |
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Wentao YeandIsotr0py
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68e07d5916
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[Bug] Fix ci issue assert output_size is not None AssertionError (#43261)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-05-21 16:58:09 +08:00 |
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zhangxin81
|
edafea3555
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Fix FlashInfer TRTLLM NvFP4 monolithic MoE routing (#43223)
Signed-off-by: zhangxin81 <115389973+zhangxin81@users.noreply.github.com>
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2026-05-21 01:17:12 -07:00 |
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zexplorerhjandzexplorerhj
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b719b1635b
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Update KDA chunk prefill decay to use exp2 semantics (#43195)
Signed-off-by: zexplorerhj <19794632+zexplorerhj@users.noreply.github.com>
Co-authored-by: zexplorerhj <19794632+zexplorerhj@users.noreply.github.com>
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2026-05-21 01:16:27 -07:00 |
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