 Fanli Lin
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d5edcb8678
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[BugFix] Fix Siglip2Attention on XPU (#28448)
Signed-off-by: Lin, Fanli <fanli.lin@intel.com>
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2025-11-11 18:18:02 +00:00 |
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Matthew BonanniandLuka Govedič
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b30dfa03c5
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[Attention] Refactor CUDA attention backend selection logic (#24794)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2025-11-11 07:40:44 -05:00 |
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570c3e1cd4
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[Bugfix] Honor --mm_encoder_attn_backend when used (#27124)
Co-authored-by: Bradley D <4551889+bradleyhd@users.noreply.github.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
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2025-10-23 20:09:52 +08:00 |
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Roger Wang
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c3a2c6ac5f
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[MM][Core] Decouple ViT backend from LM backend (#27061)
Signed-off-by: Roger Wang <hey@rogerw.io>
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2025-10-21 00:30:10 -07:00 |
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Harry Mellor
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8fcaaf6a16
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Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-12 09:51:31 -07:00 |
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Lukas Geiger
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2c1c7dfb35
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[Models][Qwen] Replace pad with cat for better performance (#26486)
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
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2025-10-09 14:51:26 +00:00 |
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Harry Mellor
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d6953beb91
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Convert formatting to use ruff instead of yapf + isort (#26247)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-05 07:06:22 -07:00 |
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TJian
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9c5ee91b2a
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[ROCm] [VL] [Bugfix] Fix vit flash attn dispatcher logic for ROCm (#26104)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2025-10-02 22:34:53 -07:00 |
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Matthew Bonanni
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2aaa423842
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[Attention] Move Backend enum into registry (#25893)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2025-10-02 20:32:24 -07:00 |
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Harry Mellor
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61aedb5ffe
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MoveVllmConfig from config/__init__.py to config/vllm.py (#25271)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-09-29 19:49:49 -07:00 |
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Hyogeun Oh (오효근)
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9a8966bcc2
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[Docs] Fix warnings in mkdocs build (continued) (#24791)
Signed-off-by: Zerohertz <ohg3417@gmail.com>
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2025-09-13 00:13:44 -07:00 |
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Wenlong Wang
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72fc8aa412
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[Multi Modal] Add FA3 in VIT (#24347)
Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
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2025-09-12 21:27:24 +08:00 |
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Isotr0py
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32d2b4064f
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[Model] Add Ovis2.5 PP support (#23405)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-08-22 17:46:34 +00:00 |
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b87cb97a53
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[Model] support new model ovis2.5 (#23084)
Signed-off-by: myselvess <244285088@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-08-19 13:12:59 +00:00 |
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