 Misha GoinandOpenAI Codex
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c9331d8064
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[CI] Preserve Rust Docker cache across commits (#53290)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-25 11:13:36 -07:00 |
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83c5d59209
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[Rust Frontend] Replace external protoc with pure Rust lib protox (#52892)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
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2026-08-20 18:43:51 -07:00 |
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c89d692cb5
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[Build] Propagate vLLM version to Rust binaries (#52593)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-17 23:37:37 -07:00 |
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Li, Jiang
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1c3633acaf
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[CI/Build][CPU] Shrink triton-cpu-build layer by dropping build artifacts (#52127)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-08-13 17:17:00 +08:00 |
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Li, Jiang
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373592ef57
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[CPU] Ship triton-cpu wheel and fix several hardcoded pin_memory=True (#52092)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-08-13 14:40:53 +08:00 |
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Li, Jiang
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6accb779a3
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[CI] Add registry layer cache to x86 CPU image build (#51911)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-08-12 17:58:01 +08:00 |
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Li, Jiang
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e9cc1fd093
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[CI/Build][CPU] Remove global extra index (#47687)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-07-06 13:42:01 +08:00 |
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AgenticSpark
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978de83353
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[Bugfix][CPU] Ship examples/ in the CPU release image (#47447)
Signed-off-by: liejiang <jianglie2023@gmail.com>
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2026-07-03 11:46:24 +00:00 |
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Li, JiangandHarry Mellor
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14f8660a18
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[CI/Build] Add CPU test dependency pre-commit hooks (#47032)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-30 07:59:13 +00:00 |
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Harry Mellor
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5316638a5e
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Fix transient dependency issues caused by requirements/common.txt (#47015)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-29 14:20:33 -07:00 |
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Kevin H. Luu
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e3e31e54b0
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[Bugfix][CPU] Don't build triton-cpu on arm64 release image (#45401)
Signed-off-by: khluu <khluu000@gmail.com>
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2026-06-12 14:51:45 -07:00 |
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Bugen Zhao
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43914dd743
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[Rust Frontend] Add Python bridge for Rust tool parsers (#44624)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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2026-06-11 04:51:06 +00:00 |
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Bugen Zhao
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fdfb2566c0
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[Rust Frontend] [CI] Unify Rust artifact builds with setuptools-rust (#44981)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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2026-06-10 17:48:34 +08:00 |
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Li, Jiang
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980796cd07
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[CI/Build][CPU] Fix flaky CI image build failure and unexpected warnings (#44852)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-08 11:10:06 +00:00 |
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Li, Jiang
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3f6f508e14
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[Bugfix][CPU] Remove invalid extra deps (#43977)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-05-29 22:02:09 +08:00 |
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Li, Jiang
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65b7a812a2
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[CPU] Experimentally enable Triton and MRV2 (#43225)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-05-22 01:48:17 -07:00 |
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39910f2b25
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[Rust Frontend] Move code from vllm-frontend-rs (#43283)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Signed-off-by: Eric Curtin <eric.curtin@docker.com>
Signed-off-by: Dev-X25874 <283057883+Dev-X25874@users.noreply.github.com>
Signed-off-by: Will.hou <1205157517@qq.com>
Signed-off-by: Will.hou <willamhou@ceresman.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Eric Curtin <eric.curtin@docker.com>
Co-authored-by: Dev-X25874 <283057883+Dev-X25874@users.noreply.github.com>
Co-authored-by: Will.hou <1205157517@qq.com>
Co-authored-by: Will.hou <willamhou@ceresman.com>
Please see https://github.com/Inferact/vllm-frontend-rs for full original commit history.
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2026-05-21 17:21:48 -07:00 |
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haosdent
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caf69823d6
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[CI] Pin protoc binary in rust-build stages (#43292)
Signed-off-by: haosdent <haosdent@gmail.com>
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2026-05-21 03:38:07 -07:00 |
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Nick HillandBugen Zhao
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f2ace1d57d
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[Frontend][RFC] Rust front-end integration (#40848)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
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2026-05-21 12:24:48 +08:00 |
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AlecandOpenAI Codex
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3f1a4bb639
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build: embed image provenance metadata in vLLM containers (#40653)
Signed-off-by: Alec Flowers <aflowers@nvidia.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-04-29 03:07:41 -07:00 |
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Li, Jiang
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d02421a7db
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[CPU] Refactor CPU affinity and memory management (#39781)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-04-17 21:01:08 +08:00 |
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03f8d3a548
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Update to transformers v5 (#30566)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: khluu <khluu000@gmail.com>
Signed-off-by: Kevin H. Luu <khluu000@gmail.com>
Signed-off-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
Co-authored-by: khluu <khluu000@gmail.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
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2026-04-15 16:29:15 -07:00 |
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Li, Jiang
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eb92ba740a
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[CI/Build] Fix sentence-transformers version in CPU test (#39557)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-04-11 07:04:25 +00:00 |
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Harry MellorandRobert Shaw
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fc645f1acc
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Add structure to requirements/ directory (#39024)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-04-10 13:46:41 -07:00 |
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Andrey Talman
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2111997f96
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[release 2.11] Update to torch 2.11 (#34644)
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2026-04-07 18:55:48 -07:00 |
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Li, Jiang
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21d7ecc5b0
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[CI/Build] Add audio deps in Dockerfile.cpu (#38876)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-04-03 05:05:14 +00:00 |
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Li, Jiang
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352b90c4a4
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[Bugfix] Add replacement of _compute_slot_mapping_kernel on CPU (#37987)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-03-24 07:00:20 -07:00 |
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7acaea634c
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In-Tree AMD Zen CPU Backend via zentorch [1/N] (#35970)
Signed-off-by: Lalithnarayan C <Lalithnarayan.C@amd.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Chinmay-Kulkarni-AMD <Chinmay.Kulkarni@amd.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-03-15 23:35:35 +00:00 |
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arlo
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8c29042bb9
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[Feature] Add InstantTensor weight loader (#36139)
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2026-03-14 18:05:23 +01:00 |
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Li, Jiangandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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092ace9e3a
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[UX] Improve UX of CPU backend (#36968)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-03-14 09:27:29 +08:00 |
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Maryam TahhanandLi, Jiang <jiang1.li@intel.com>
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f07a128413
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[CPU][ARM] Add ARM BF16 cross-compilation support and improve documen… (#33079)
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-02-15 06:33:08 -08:00 |
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Kunshang Ji
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cb9574eb85
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[XPU][9/N] clean up existing ipex code/doc (#34111)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-02-11 00:27:15 -08:00 |
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Xinan MiaoandSouthWest7
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604e3b87e8
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[Feature]: Container image WORKDIR consistency (#33159)
Signed-off-by: SouthWest7 <am1ao@qq.com>
Co-authored-by: SouthWest7 <am1ao@qq.com>
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2026-01-28 11:06:48 +08:00 |
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Maryam TahhanandLi, Jiang <jiang1.li@intel.com>
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203d0bc0c2
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[CPU] Improve CPU Docker build (#30953)
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-01-24 17:08:24 +00:00 |
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Fadi ArafehandLi, Jiang <jiang1.li@intel.com>
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10e94c84f6
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[CPU][Feat] Update PyTorch to v2.10 for CPU Backend (#32869)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-01-23 21:13:06 +08:00 |
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Li, Jiang
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e3ab93c896
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[CPU] Refactor CPU fused MOE (#30531)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-12-18 14:36:49 +08:00 |
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Li, Jiangandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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cfb7e55515
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[Doc][CPU] Update CPU doc (#30765)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2025-12-18 04:59:09 +00:00 |
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Li, Jiang
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e2f56c309d
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[CPU] Update torch 2.9.1 for CPU backend (#29664)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-28 13:37:54 +00:00 |
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Cyrus Leung
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b34e8775a3
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Revert "[CPU]Update CPU PyTorch to 2.9.0 (#29589)" (#29647)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-11-27 22:43:18 -08:00 |
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scydasandLi, Jiang <jiang1.li@intel.com>
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35657bcd7a
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[CPU]Update CPU PyTorch to 2.9.0 (#29589)
Signed-off-by: scyda <scyda@outlook.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2025-11-28 09:34:33 +08:00 |
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Fadi Arafeh
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3168285fca
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[cpu][ci] Add initial set of tests for Arm CPUs (#28657)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-20 02:37:09 +00:00 |
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Li, Jiang
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7f829be7d3
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[CPU] Refactor CPU attention backend (#27954)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-12 09:43:06 +08:00 |
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Li, JiangandIsotr0py
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d34f5fe939
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[Bugfix][CPU] Fallback oneDNN linear to torch linear to fix half gemm support on legecy platforms (#27526)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-10-27 23:25:44 -07:00 |
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ioana ghiban
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435be10db9
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Fix AArch64 CPU Docker pipeline (#27331)
Signed-off-by: Ioana Ghiban <ioana.ghiban@arm.com>
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2025-10-24 05:11:01 -07:00 |
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Huy Do
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ed540d6d4c
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Update release pipeline for PyTorch 2.9.0 (#27303)
Signed-off-by: Huy Do <huydhn@gmail.com>
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2025-10-22 09:18:01 +00:00 |
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Huy DoandLuka Govedič
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becb7de40b
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Update PyTorch to 2.9.0+cu129 (#24994)
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2025-10-21 17:20:18 -04:00 |
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ioana ghiban
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1c691f4a71
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AArch64 CPU Docker pipeline (#26931)
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2025-10-20 07:09:40 -04:00 |
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Harry Mellor
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e09d1753ec
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Remove Python 3.9 support ahead of PyTorch 2.9 in v0.11.1 (#26416)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-08 10:40:42 -07:00 |
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Cyrus Leung
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d00d652998
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[CI/Build] Replace vllm.entrypoints.openai.api_server entrypoint with vllm serve command (#25967)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-10-02 10:04:57 -07:00 |
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Reza BarazeshandHarry Mellor
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bc546f76a1
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[CI] Move applicable tests to CPU (#24080)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-09-30 14:45:20 +01:00 |
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