 yimdevandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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eab1cff5b0
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Harden DeepSeek V3.2 fused kernel grids (#52381)
Signed-off-by: yimdev <5779256+yimdev@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-18 01:43:12 -07:00 |
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Jee Jee Li
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2687fec6ef
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Replicated embedding and norm fusion for DSV3 flat model (#48484)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-18 14:53:21 +08:00 |
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Andreas KaratzasandOpenAI Codex
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5fa8ca971a
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[ROCm][CI] Move ROCm AITER quantization tests (#40938)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-18 14:50:35 +08:00 |
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ℍ𝕠𝕝𝕝𝕠𝕨 𝕄𝕒𝕟
|
d5f5de7a7d
|
[Bugfix] Fix DeepSeek V4 mHC broadcast buffer for weight sync (#52626)
Signed-off-by: Hollow Man <hollowman@opensuse.org>
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2026-08-18 10:55:37 +08:00 |
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kiroxu
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cdb8545a91
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[Kernel][Perf] Support Qwen head ratios in fused GDN MTP (#52539)
Signed-off-by: kiroxu <148877251+BabyDrangoner@users.noreply.github.com>
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2026-08-17 18:17:40 -07:00 |
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Bo Liandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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c296851a7d
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[MoE] Refine FlashInfer one-sided All2All integration (#51924)
Signed-off-by: Bo Li <22713281+bobboli@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-18 00:18:14 +00:00 |
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Divakar Verma
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49fb2ee348
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[ROCm][CI] add Aiter ops tests (#52208)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-08-17 18:33:22 -05:00 |
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Micah Williamson
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8878ebd8fd
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[ROCm][CI] Expand AITER W4A4 MoE Coverage (#52647)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-08-17 15:46:22 -05:00 |
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Andreas Karatzasandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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c1e438728c
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[ROCm][CI] Restore Torch defaults and type DSV4 scratch buffers (#52566)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-17 18:32:04 +00:00 |
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Misha Goin
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4ab5e5012a
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[Refactor] Simplify B12X linear kernels and warmup (#52368)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-08-17 09:45:45 -07:00 |
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qli88
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1d3a8b9e22
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[ROCm][Bugfix] Fix Triton W4A16 bug in determining if transpose is required for GPTQ/AutoGPTQ (#48998)
Signed-off-by: Qiang Li <qiang.li2@amd.com>
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2026-08-17 12:26:05 +00:00 |
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ef43e3101b
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[ROCm][DSV4][Perf] Optimize Triton sparse-MLA decode on gfx950 (#52212)
Signed-off-by: Fangzhou Ai <fangzhou.ai@amd.com>
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Cursor Grok 4.6 <cursoragent@cursor.com>
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2026-08-16 12:16:46 -07:00 |
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Wentao Ye
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7d7b6f26f4
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[Refactor] Remove dead code for quantization (#52221)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-08-16 13:10:16 -04:00 |
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edd4c8176c
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[Bugfix][DSv4] Revert adaptive C128A metadata packing (#51318)
Signed-off-by: tobymao <toby.mao@gmail.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-15 18:39:23 -07:00 |
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Gabriel Wu
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97388c44f9
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[Bugfix] Make DSV4 sparse MLA work end-to-end for plain decode, MTP, and DSpark (#51538)
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2026-08-15 07:01:32 -07:00 |
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Guanxin LiandClaude Opus 5
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925ea7e60f
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[CI][Test] Seed the DeepEP v2 MoE workers, not just the parent (#50589)
Signed-off-by: Guanxin Li <guanxinl@nvidia.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-14 16:01:24 -04:00 |
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Zhuobin Huangandnodeeeeee
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63a9a5010a
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[Attention][DSA] Take the native decode path for MTP=3 on SM90 (#52164)
Signed-off-by: zobinHuang <zobin1999@gmail.com>
Co-authored-by: nodeeeeee <zhangkai.nodeee@gmail.com>
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2026-08-14 10:09:51 +00:00 |
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ccaadaroandLi, Jiang <jiang1.li@intel.com>
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bda4c3e8ee
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[CPU] Fold the MXFP4 block scale in 2 instructions instead of 4 (#51583)
Signed-off-by: ccaadaro <ccanadar@unex.es>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-08-14 08:19:21 +00:00 |
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1be3628367
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[Kernel][Perf] Add fused CUDA post-conv MTP decode kernel for Qwen3.5 GDN (#51674)
Signed-off-by: Jie Fang <jief@nvidia.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-14 11:44:45 +08:00 |
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Luke Alonso
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3c79b1a8bf
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[Kernel] Add B12X dense linear backends (#52016)
Signed-off-by: Luke Alonso <lalonso@gmail.com>
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2026-08-13 19:48:33 -07:00 |
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bastefaniak
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71b0da7c4e
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[Bugfix] Fix .../mrope.py::apply_interleaved_rope() when torch.compile is used in torch==2.13 (#52005)
Signed-off-by: Bartosz Stefaniak <bstefaniak@nvidia.com>
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2026-08-13 22:08:40 +00:00 |
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stefankoncarevic
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11c3fa4adc
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[Bugfix][ROCm][CI] Give the AITER MLA decode metadata stub its MLA dims (#52139)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
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2026-08-13 13:35:00 -05:00 |
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c5b7c069a4
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[ROCm] Defer tilelang import through its import from vllm.tilelang_utils import tilelang and relaxed has_tilelang (#51159)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-13 13:12:40 -05:00 |
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Thien Tran
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6014f9e672
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[Kimi-K3] Add GEMM-RS for sequence parallelism (#52079)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-08-13 09:02:28 -07:00 |
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Michael Goin
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2d24355eb8
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[Bugfix] Fix packed GDN decode launch for large batch-head grids (#52030)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-08-13 07:19:08 -07:00 |
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903d2efe7e
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[Attention][MLA] Fuse Kimi-K3 chunked-context K/V packing (#51772)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-12 22:42:57 -07:00 |
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61826c1c6f
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[Hardware][Power] Unqualized MoE Backend for Power (VSX) (#51624)
Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Antigravity <antigravity@google.com>
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2026-08-13 10:56:09 +08:00 |
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xiao fengandMichael Goin
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e62abc37d4
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[Bugfix][Kernel] Fix persistent top-k histogram reuse after short rows (#49139)
Signed-off-by: fxfxfxfxfxfxfxfx <227935476@qq.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2026-08-12 12:54:45 -07:00 |
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19d61b1273
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[Bugfix] Initialize DeepGemmQuantScaleFMT oracle lazily; bound QuantFP8 UE8M0 packed path to group_size 128 (#51359)
Signed-off-by: BabyDrangoner <148877251+BabyDrangoner@users.noreply.github.com>
Signed-off-by: kiroxu <148877251+BabyDrangoner@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-12 14:27:50 -04:00 |
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stefankoncarevic
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d20a031d33
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[Bugfix][ROCm][MoE] Update AITER MXFP4 W4A16 tests to the renamed expert_mask (#51980)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
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2026-08-12 17:45:45 +00:00 |
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9035151d6c
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[Model] Add native Dots3 NOTE multimodal support (#51255)
Signed-off-by: KurodaKanbei <mistergalahad@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-08-12 23:13:20 +08:00 |
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Matvei PashkovskiiandClaude
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20727e2841
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[Hardware][AMD] Enable fused bf16→fp32 router GEMM on ROCm (#50268)
Signed-off-by: Matvei Pashkovskii <mpashkov@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-12 02:46:13 +00:00 |
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Micah WilliamsonandAndreas Karatzas
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045a986f3b
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[ROCm][CI] Speed Up ROCm Skinny GEMM Tests (reduced parameterizations, (#51877)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-12 01:40:13 +00:00 |
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1d2d83a07f
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[Attention] Add FlashInfer XQA decode support on SM12x (#49718)
Signed-off-by: Andrii Skliar <askliar@nvidia.com>
Signed-off-by: Andrii Skliar <andreyws96@gmail.com>
Co-authored-by: Andrii Skliar <askliar@nvidia.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-11 16:32:49 -07:00 |
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Rohan PotdarandClaude Opus 4.8
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0f0cb918b7
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[ROCm][MoE] Fix expert_map vs AITER expert_mask for non-AITER experts under EP (#49758)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-08-11 15:33:02 -05:00 |
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Andreas Karatzasandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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36f4630d89
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[Bugfix][MoE] Fix fused block-scale orientation (#50727)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-11 16:05:38 -04:00 |
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Andreas KaratzasandOpenAI Codex
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1ab2801dde
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[ROCm] Remove stale SDPA and skinny GEMM workarounds (#50907)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-11 14:19:16 -04:00 |
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5426311d91
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[Kernel][ROCm][Perf] FlyDSL decode-attention kernel for 4-bit TurboQuant KV cache (#47896)
Signed-off-by: root <root@smci355-ccs-aus-m02-09.cs-aus.dcgpu>
Co-authored-by: root <root@smci355-ccs-aus-m02-09.cs-aus.dcgpu>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-11 08:45:39 -07:00 |
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pmanczakandKunshang Ji
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5b5eae2394
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[Misc] Enable test_silu_mul_fp8_quant_deep_gemm on XPU (#49444)
Signed-off-by: pmanczak <pawel.manczak@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-11 23:19:14 +08:00 |
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Fangzhou Ai
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1044d19998
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[ROCm][DSV4] Preserve native MXFP4 TP8 shard allocation (#51473)
Signed-off-by: Fangzhou Ai <fangzhou.ai@amd.com>
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2026-08-10 23:57:27 -07:00 |
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Priyansh JainandAndreas Karatzas
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2acb055ed7
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[CPU][Zen] Route BF16 MoE inference through zentorch on AMD (#44201)
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-10 23:20:05 -07:00 |
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c76a425278
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[Kernel] Optimize long-context MLA cache gathers (#51739)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-10 22:23:43 -07:00 |
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63ac04a61e
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[Kimi-K3] DCP support (#50484)
Signed-off-by: girasoley <girasoley@inferact.ai>
Signed-off-by: Summer Yang <girasoleyang@gmail.com>
Signed-off-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: 云挚 <ningyunxiao.nyx@antgroup.com>
Co-authored-by: foraxe <73625538+foraxe@users.noreply.github.com>
Co-authored-by: Woosuk Kwon <woosuk@inferact.ai>
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2026-08-10 12:54:26 -07:00 |
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fanxingran
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37fbf52084
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[ROCm][MLA] [K3] Fix fp8 KV cache decode on the AITER MLA backend (#51011)
Signed-off-by: fanxingran <xingran.fan@amd.com>
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2026-08-10 11:42:10 -04:00 |
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Francesco FuscoandClaude
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fac808b36f
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[Perf][Hybrid] 3D-grid tiling of the state-copy Triton kernels (#49436)
Signed-off-by: Francesco Fusco <ffu@zurich.ibm.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-10 17:02:49 +02:00 |
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pmanczak
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ec21f61d82
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[Misc] Enable test_fused_moe_wn16 on XPU (#51672)
Signed-off-by: pmanczak <pawel.manczak@intel.com>
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2026-08-10 21:57:02 +08:00 |
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Andreas KaratzasandMicah Williamson
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31cd109f18
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[ROCm][CI] Extend ROCm AITER MHA (FA) coverage (#40958)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: Micah Williamson <micah.williamson@amd.com>
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2026-08-10 15:35:13 +08:00 |
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Lena OnyshchenkoandKunshang Ji
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751f2ccdd3
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[Kernel][XPU] Tensor-descriptor operand loads for Triton W8A8 scaled_mm (#47205)
Signed-off-by: oonyshch <xonyshch@gmail.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-10 00:56:11 +00:00 |
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Isotr0py
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073c510c91
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[Migration] Migrate bitsandbytes support to OOT plugin (#43529)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
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2026-08-09 10:27:31 +08:00 |
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Aarushi JainandAarushi Jain
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7581c56c86
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[Test] Add ROCm AITER FP8 MLA prefill accuracy test (#51457)
Signed-off-by: Aarushi Jain <aarushi@amd.com>
Co-authored-by: Aarushi Jain <aarushi@amd.com>
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2026-08-08 19:42:26 -05:00 |
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