 Jee Jee Li
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88e1b11313
|
[Perf] Tune FlashInfer all-reduce thresholds for single-node TP8 on SM103 (#53606)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-26 01:46:56 +00:00 |
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Khushali Desai
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23ab0cfdbc
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speculative decoding under tensor parallelism (TP>1) , workspace creation select max hidden dim of target and draft model (#52193)
Signed-off-by: khushali9 <khushali.desai9@gmail.com>
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2026-08-24 21:33:36 +00:00 |
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Lucas Wilkinson
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8bdc70ec7b
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[6/N][KV-Cache Layout Refactor] Standardize KV cache layout (#51718)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-08-21 17:47:49 -07:00 |
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shanjiaz
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e078a2238a
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[Bugfix] Widen flashinfer.comm import guard so a failed import doesn't abort engine startup (#52241)
Signed-off-by: shanjiaz <zsjwpianpian@gmail.com>
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2026-08-14 16:27:24 +00:00 |
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Andreas Karatzas
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7e724dca89
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[ROCm] Fix AITER all-reduce fusion coverage (#50802)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-06 14:52:23 +08:00 |
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skysnow2001andDouglas Lehr
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f43e1d26e3
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[ROCm] Enable AITER and FP8 inference on GFX120x (#43615)
Signed-off-by: skysnow2001 <skysnow9285@gmail.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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2026-08-03 16:45:37 -05:00 |
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Wentao Ye
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0cf49a5d15
|
[Refactor] Remove multiple dead codes (#50285)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-08-03 10:59:08 -04:00 |
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Richard ZouandCodex
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c27b080d26
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[compile] Fix fake kernel return dtype (#50444)
Signed-off-by: Richard Zou <zou3519@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
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2026-07-30 19:50:02 +00:00 |
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BadrBasowid
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59e831c09a
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[Compilation]Fuse Transformers Residual Add + RMSNorm (#48757)
Signed-off-by: BadrBasowid <badr.basowid@gmail.com>
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2026-07-30 13:46:36 +00:00 |
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5fa0154448
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[Rubin] Enable NVLink all-reduce paths on SM107 (#49647)
Signed-off-by: Zachary Aristei <zaristei@nvidia.com>
Co-authored-by: Sahithi Chigurupati <chigurupati.sahithi@gmail.com>
Co-authored-by: hlu1 <14827759+hlu1@users.noreply.github.com>
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2026-07-29 20:53:25 +00:00 |
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afriedri
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f472ab0a4c
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Remove triton per group quant [ROCm] [Bugfix] (#49621)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
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2026-07-28 05:53:46 +00:00 |
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Chaojun ZhangandKunshang Ji
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bf4f633b4c
|
[XPU] Enable QK Norm + RoPE fusion pass on XPU (#49394)
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-27 03:22:29 +00:00 |
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Schwinn Saereesitthipitak
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b5b61c622c
|
[Core][Distributed] Add process-checkpoint lifecycle hooks for communicators (starting with Flashinfer) (#46877)
Signed-off-by: Schwinn Saereesitthipitak <schwinns@nvidia.com>
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2026-07-26 14:47:50 -04:00 |
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Woosuk Kwon
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213f681f81
|
Revert "[Perf][GLM-5.2] Blackwell decode optimizations" (#49768)
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2026-07-24 16:04:59 -07:00 |
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dd72658e7d
|
[Perf][GLM-5.2] Blackwell decode optimizations (#48597)
Signed-off-by: Peiyuan Zhou <peiyuanzhou1994@gmail.com>
Signed-off-by: zhou <zhou@zhoudeMacBook-Pro.local>
Signed-off-by: Stefan Koncarevic <stefan.koncarevic@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Giancarlo Delfin <32987265+TheEpicDolphin@users.noreply.github.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: zhou <zhou@zhoudeMacBook-Pro.local>
Co-authored-by: stefankoncarevic <Stefan.Koncarevic@amd.com>
|
2026-07-23 21:36:27 -07:00 |
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stefankoncarevicandAndreas Karatzas
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387189c429
|
[ROCm] Remove redundant AITER fused_qk_rmsnorm probe (avoids config-time HIP init) (#47992)
Signed-off-by: Stefan Koncarevic <stefan.koncarevic@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-21 22:58:14 -05:00 |
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Jack HuandDouglas Lehr
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2cab53ddee
|
[Model][Hardware][AMD]: Part 1/2 -> Enable e2e QK Norm + RoPE + KV Cache runtime fusion for Qwen3-30B-A3B on ROCM_AITER_FA, and ROCM_AITER_UNIFIED_ATTN (#42749)
Signed-off-by: Jack Hu <Jack.Hu@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
|
2026-07-16 17:39:04 -05:00 |
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Wentao Ye
|
626c90b2d5
|
[Refactor] Move fla to third party (#48500)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-07-16 19:22:36 +01:00 |
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aoshen02andOpenAI Codex
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3b39fd284a
|
[Bugfix][Spec Decode] Support heterogeneous QK fusion geometry (#48671)
Signed-off-by: aoshen02 <aoshen@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
|
2026-07-14 22:37:10 -07:00 |
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Mohammad Miadh Angkad
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75fe92a316
|
[Distributed][Perf] Enable FlashInfer MNNVL allreduce RMS quant fusion (#48064)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
|
2026-07-13 15:02:59 +08:00 |
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Hugo Centeno
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5f8e73cb8b
|
[Bugfix] Guard mixed-dtype allreduce RMSNorm quant fusions (#48330)
Signed-off-by: hcenteno <hugo.centeno@estudiantat.upc.edu>
|
2026-07-12 09:39:27 +00:00 |
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429f405748
|
[Bugfix] Guard CUDA-only rms_norm_per_block_quant in FUSED_OPS for non-CUDA builds (#47296)
Signed-off-by: Tsvika Shapira <tsvika@moonmath.ai>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-07-09 10:10:53 -04:00 |
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jescoandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
598d51153a
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[Bugfix][Distributed] Delegate MNNVL allreduce one-shot selection (#47589)
Signed-off-by: jesco-absolut <team@srswti.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-07-06 07:47:06 -07:00 |
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BadrBasowid
|
740f379fae
|
[ROCm][AITER] Directly Implement AITER Custom All-reduce in CudaCommunicator (#46065)
Signed-off-by: BadrBasowid <badr.basowid@gmail.com>
|
2026-07-06 12:16:32 +00:00 |
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xaguilar-amd
|
09663abde0
|
[ROCm][MLA] Fuse MLA q/kv RMSNorm + FP8 per-token quant in the FP8 attention path (#44977)
Signed-off-by: Xavier Aguilar <xavier.aguilarfruto@amd.com>
Signed-off-by: Xavier Aguilar <Xavier.AguilarFruto@amd.com>
|
2026-07-02 13:00:41 +08:00 |
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Yejing LaiandKunshang Ji
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f651a8a9a4
|
[XPU][UT]Enable ut qk_norm_rope_fusion (#42486)
Signed-off-by: Lai, Yejing <yejing.lai@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-07-01 07:38:03 +00:00 |
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Jeff (Junze) Maandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
fc61c6fc26
|
[Perf] Enable + tune FlashInfer fused allreduce at world_size=16 on SM 10.3 (GB300) (#46392)
Signed-off-by: Jeff Ma <jeffjma@umich.edu>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-24 23:04:17 -07:00 |
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Mohammad Miadh Angkad
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d1a38c2762
|
[Kernel][Performance] Add FlashInfer cutedsl NVFP4 GEMM backend (#42235)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
|
2026-06-22 16:17:18 -04:00 |
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Ace Eldeib
|
b4092176b9
|
[Bugfix] Complete one-shot fused all-reduce PDL at end to avoid NaN (#45448)
|
2026-06-18 00:54:39 +00:00 |
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Thomas Parnell
|
ebf3a6d705
|
[Bugfix] Fix trtllm fused allreduce+rms_norm for transformers backend (#45307)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
|
2026-06-16 08:34:27 +00:00 |
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Chaojun Zhang
|
2725c84aae
|
[XPU] Enable sequence parallel support for XPU (#38608)
Signed-off-by: chaojun-zhang <chaojun.zhang@intel.com>
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
Signed-off-by: Chaojun,Zhang <chaojun.zhang@intel.com>
|
2026-06-14 19:26:46 -07:00 |
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Markus HartikainenandFrida Andersson
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80e2c4462d
|
[ROCm][Compile] Fuse AR + RMSNorm + per-group FP8 quant (+ DSv3.2 indexer fan-out) (#42864)
Signed-off-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Frida Andersson <fanderss@amd.com>
|
2026-06-09 12:06:56 +00:00 |
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Vadim Gimpelson
|
67d3792d99
|
[Bugfix] Fix Qwen3.5-FP8 nightly fail. Guard fused_add_rms_norm input/weight dtype mismatch in RMSNorm + quant fusion (#44694)
|
2026-06-06 08:46:14 -04:00 |
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Mike GandMichael Gschwind
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2f27c9a150
|
Preserve layout-changing clones (#44574)
Signed-off-by: Michael Gschwind <mgschwind@nvidia.com>
Co-authored-by: Michael Gschwind <mgschwind@nvidia.com>
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2026-06-05 20:45:24 -04:00 |
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akii96andmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
4200f62147
|
[ROCm][GPT-OSS] Fuse RoPE + static Q FP8 quant on fused RoPE+KV path (#42832)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-05 16:22:19 -05:00 |
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Harry Mellor
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a80af24356
|
Speed up docs build (#44635)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
|
2026-06-05 14:51:44 +00:00 |
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QiliangCui2023
|
9354fb1ba5
|
[Bugfix][Compile] Guard per_token_group_fp8_quant lookup on non-CUDA platforms (#44476)
|
2026-06-04 09:31:50 -04:00 |
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d0975a4b50
|
[perf] Add gemma RMS AR fusion (#42646)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
|
2026-06-04 01:33:59 -07:00 |
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Charlie Fu
|
71df063c49
|
Enable perf_token_group_quant/_C_stable_libtorch for ROCm (#42758)
Signed-off-by: charlifu <charlifu@amd.com>
|
2026-06-02 23:23:28 -07:00 |
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liuzhenweiandKunshang Ji
|
3f3e2702c2
|
[XPU] Enable rms_norm/act quant fusions (#43963)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-02 16:14:41 +00:00 |
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pschlan-amd
|
88f172188b
|
[ROCm] Fix AITER RMSNormQuantFusion for Kimi-Linear (#44308)
Signed-off-by: Patrick Schlangen <pschlan@amd.com>
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2026-06-02 14:50:21 +00:00 |
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rasmith
|
9769e2df2a
|
[AMD][CI][BugFix] Fix Distributed Compile Unit Tests (2xH100-2xMI300) group (#43120)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
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2026-05-28 14:39:01 -07:00 |
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Jee Jee Li
|
6e503868ca
|
[Kernel] Porting fuse_minimax_qk_norm to manual fusion (#43410)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-26 13:16:03 -07:00 |
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TJian
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46f95b2ec2
|
[ROCm][Critical] Fix the GDN import bug (#43486)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-23 21:12:58 +00:00 |
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Jee Jee Li
|
ee05e8137e
|
[Minor] Bigger overlap for FI AR (#43103)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-20 21:20:57 -07:00 |
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Rita Brugarolas
|
bd9dbe6060
|
[ROCm][Bugfix] Fix fused_mla_dual_rms_norm for AITER API rename _fused_qk_rmsnorm (#42606)
Signed-off-by: Rita Brugarolas Brufau <rita.brugarolasbrufau@amd.com>
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2026-05-15 14:50:03 -06:00 |
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TresandCursor
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f887aa1a53
|
[Aiter][ROCm] RMSNormGated+GroupedQuantFP8 fusion (#40710)
Signed-off-by: Tres Popp <tres.popp@amd.com>
Signed-off-by: Tres Popp <trespopp@gmail.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-05-14 15:37:09 -04:00 |
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akii96
|
74dffae666
|
[ROCm] Run AITER RMSNorm pad fusion before AR RMS fusion (#42411)
Signed-off-by: Aakif Nawaz <aakif.nawaz@amd.com>
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2026-05-13 18:35:12 +08:00 |
|
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a721315488
|
[ROCm][Perf] Fix RMSNorm+Quant fusion for gfx950 (non-fnuz) (#41825)
Signed-off-by: Frida Andersson <fanderss@amd.com>
Signed-off-by: Chuan Li <chuali@amd.com>
Co-authored-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Chuan Li <chuali@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Frida Andersson <frida-andersson@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-05-11 15:00:51 -04:00 |
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Rohan PotdarandElizaWszola
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a51376b3f0
|
[Performance][DSR1]: Fused RoPE+KVCache+q_concat for MLA (#40392)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
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2026-05-11 14:10:50 +00:00 |
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