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579aef4e8d
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[ROCm] Bump AITER to 0.1.21.post1 (#52826)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: fai <fangzhouai@gmail.com>
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2026-09-03 16:28:40 -07:00 |
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Fangzhou Ai
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8bf39632b8
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[ROCm][Perf] Add low-M FP32 router GEMM for gfx950 (#54845)
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2026-09-03 10:42:25 -07:00 |
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b7624069ff
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[Fusion] Manual ActivationQuantFusionPass initial application (#51415)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
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2026-09-03 13:37:31 -04:00 |
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Bolin SunandClaude Fable 5
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d410fc12f3
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[Kernel] Enable Kimi-K3 SiTU on the CuteDSL MoE backend and the SM107 low-latency GEMM plan (#54606)
Signed-off-by: Bolin Sun <bolins@nvidia.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-09-03 16:49:31 +00:00 |
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Jiangyun Zhu
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98ed0856f3
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[Model] add GLM-5.3-Flash support (#53906)
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2026-09-03 09:40:35 -07:00 |
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5d09eb2cf3
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[Bugfix][MoE] Preserve unquantized weight storage on ROCm (#46009)
Signed-off-by: bingzhaodong <aaab8b@gmail.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2c5.prov.aus.ccs.cpe.ice.amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2a0.prov.aus.ccs.cpe.ice.amd.com>
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2026-09-03 11:06:09 +08:00 |
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a0d3e5c16e
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[XPU] Add fused GemmaRMSNorm path for eager execution (#53678)
Signed-off-by: Huanxing <huanxing.shen@intel.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-09-03 06:11:20 +08:00 |
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Isotr0py
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1356635d83
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[New model][Multimodal] Add DeepSeek-V4-Flash-Vision-Exp support (#54566)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
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2026-09-02 11:09:09 -07:00 |
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Harry MellorandClaude Opus 5
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d539de1c5d
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[Docs] Add missing return annotations flagged by griffe (#54980)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-02 09:56:07 -07:00 |
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ffe3bb3c72
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[Hardware][XPU] Register matmul and linear batch-invariant kernels for XPU (#49209)
Signed-off-by: tzielinski-habana <tomasz.zielinski@intel.com>
Signed-off-by: Tomasz Zielinski <85164140+tzielinski-habana@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-09-02 13:31:38 +00:00 |
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fxmarty-amd
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7894394b07
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[Online quantization] Add targeted online quantization configuration based on user patterns (#51285)
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2026-09-02 08:55:15 -04:00 |
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Micah Williamson
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ce6a283c09
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[Bugfix] Restore weight_dtype in QuarkW8A8Fp8MoEMethod to fix GPT-OSS FP8 MoE weight loading (#54824)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-09-01 16:08:11 -05:00 |
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7a977c0699
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[ModelOpt] Redesign the LinearMethod classes using the generic QuantKey-driven method (#49381)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-01 16:28:56 -04:00 |
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stefankoncarevic
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73723b707f
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[ROCm][MoE] Fix gfx950 block scale swizzle for AITER Triton MXFP4 W4A16 (#54773)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
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2026-09-01 19:48:45 +00:00 |
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Julien Debache
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ab54f5bd83
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[Chore] Remove redundant _pack_topk_ids_weights_kernel in TrtLLM NvFP4 MoE (#46872)
Signed-off-by: jdebache <jdebache@nvidia.com>
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2026-09-01 15:30:11 -04:00 |
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2fe5cef35e
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[Fix] Fix FSE compatibility detection for Quark-produced models (#54573)
Signed-off-by: xuebwang-amd <xuebwang@amd.com>
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: xuebwang-amd <xuebwang@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-01 12:12:20 -05:00 |
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Misha GoinandOpenAI Codex
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82b7d49a6e
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[MoE] Generalize masked activation for padded layouts (#51217)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-09-01 11:34:13 -04:00 |
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Andrii SkliarandAndrii Skliar
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adebc41b7e
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[Mamba] Add FlashInfer ReplaySSM backend (#52506)
Signed-off-by: Andrii Skliar <askliar@nvidia.com>
Signed-off-by: Andrii Skliar <andreyws96@gmail.com>
Co-authored-by: Andrii Skliar <askliar@nvidia.com>
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2026-09-01 10:26:43 -04:00 |
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92ccd2c306
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[Bugifx][INC] Fix INC quantization method selection for non-quantized layers (#47237)
Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-01 10:40:47 +00:00 |
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8f03625b3d
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[CPU][Zen] Route Int8 MoE inference through zentorch on AMD (#44834)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-01 09:31:31 +00:00 |
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fxmarty-amdandAndreas Karatzas
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63988f3c2d
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[Quantization][Refactor][1/N] Adopt QuantKey in QuarkConfig and methods, relying on weight_quant_key, act_quant_key for quant method dispatch (#52958)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-01 02:55:54 -05:00 |
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sychen52
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7c5dc571cb
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[Attention][DSA] Enable W4A16 DSA (#51724)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-09-01 12:37:47 +08:00 |
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afriedriandAndreas Karatzas
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dc9114b201
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[ROCm][MoE] Split AITER CK and Triton MXFP4 W4A16 into separate backends (#50622)
Signed-off-by: afriedri <afriedri@amd.com>
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-31 23:14:14 -05:00 |
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Roberto L. CastroandCodex
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e16b5e518d
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[1/N][warmup][DSv4] Migrate generic MLA metadata and indexing kernels (#50175)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
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2026-08-31 23:26:05 -04:00 |
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Lain
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882ca8d696
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[Kernel] add Flashinfer cutedsl w4a16 linear (#53014)
Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
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2026-09-01 02:49:14 +00:00 |
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4c21d41733
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[XPU] Route activation CustomOps to SYCL kernels (#53734)
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-09-01 09:19:52 +08:00 |
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f5c3cc240b
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[Perf][Kernel] Tune cooperative topk for medium batch-sizes (#53382)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-31 13:44:38 -07:00 |
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Zhenzhong XuandKunshang Ji
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bd575a0d0b
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[AutoRound] Support AutoRound Format Block-Wise FP8 in vLLM (#47434)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-31 22:56:20 +08:00 |
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Jee Jee Li
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e2c8eeac40
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[kernel] Fused embedding kernel (#53677)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-31 11:34:14 +00:00 |
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jl9876andKunshang Ji
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1b9539d37c
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[Quantization][Autoround][XPU] Support AutoRound MXFP8 MoE models (#51248)
Signed-off-by: jl9876 <jia.li@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-31 16:37:01 +08:00 |
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zofiaandopencode
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2a61f060d3
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[XPU] Ensure unquantized linear weight is N-contiguous (#53536)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Co-authored-by: opencode <noreply@opencode.ai>
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2026-08-31 16:01:24 +08:00 |
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Li, Jiang
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fdbf2ddbd2
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[Bugfix][CPU] Fix several bugs (#54042)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-08-31 15:33:06 +08:00 |
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Jee Jee Li
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8e92248f79
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[Kernel] Retire the DSv3 router GEMM CUDA kernel (#54040)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-31 07:15:31 +00:00 |
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+5
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e126687a9a
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[Model] Support Qwen3.8-Flash-Next (#53896)
Signed-off-by: huanghaoyan.hhy <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: lishunyang12 <lishunyang03@gmail.com>
Signed-off-by: Harry Huang <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Yifan Qiao <yifanqiao@inferact.ai>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: KungYork <firelikest@163.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: andyluo7 <43718156+andyluo7@users.noreply.github.com>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: lishunyang12 <lishunyang03@gmail.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-31 05:57:56 +00:00 |
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7ab2923489
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[Flashinfer] Upgrade Flashinfer version to 0.6.18 (#54313)
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Signed-off-by: Wei Zhao <51183510+wzhao18@users.noreply.github.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2026-08-30 16:01:05 -07:00 |
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Aditya JhaandClaude
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9d0fe9bac8
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[Bugfix][Quantization][MoE] Route weight only NVFP4 checkpoints through W4A16 (#54427)
Signed-off-by: Aditya Jha <4adityajha@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-08-30 13:02:15 -04:00 |
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Jiangyun ZhuandOpenAI Codex
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8c51b92654
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[Bugfix] Avoid global config lookup in sparse indexer forward (#54400)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-30 03:31:47 -07:00 |
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2c7d7dd64a
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[Perf][ROCm] Dual-stream decode with hipgraphs (#52033)
Signed-off-by: simondanielsson <simon.danielsson99@hotmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-08-30 08:24:20 +00:00 |
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hcl
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b5707bf994
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[Bugfix][MoE] Enable cuBLAS out_dtype router GEMM on all CUDA archs (fixes family-120/GB10) (#54048)
Signed-off-by: Chenglun Hu <chenglunhu@gmail.com>
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2026-08-29 19:18:42 -07:00 |
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Shenglei FuandClaude Fable 5
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129087ddab
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[Perf] Reuse topk SparseMatrix routing metadata in GPT-OSS MoE forward (#45457)
Signed-off-by: Shenglei Fu <sfu@confluent.io>
Signed-off-by: Shenglei Fu <117230642+ShengleiFu@users.noreply.github.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-29 12:14:39 -04:00 |
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Nicolò Lucchesi
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7f4793eaa3
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[Nixl][PD] DCP support for MLA models (#50611)
Signed-off-by: NickLucche <nicolo.lucchesi@mistral.ai>
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2026-08-29 16:03:53 +00:00 |
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b2f685834a
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[Hy4] support Hy4-preview model (#54160)
Signed-off-by: chengvjiang <chengvjiang@tencent.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: chengvjiang <chengvjiang@tencent.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: russellfeng <russellfeng@tencent.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-08-29 12:07:28 +08:00 |
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Nick Hill
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6c18a54648
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[Perf] Avoid h2d copies from non-pinned CPU tensors (#54299)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
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2026-08-29 12:06:30 +08:00 |
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46a83642f6
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[Perf] Pin CPU tensors before non_blocking H2D in three MM paths (#54292)
Signed-off-by: Keyi Li <likey6688@gmail.com>
Co-authored-by: Keyi Li <likey6688@gmail.com>
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
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2026-08-28 20:13:40 -07:00 |
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Nick HillandKimi Code
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70732942c6
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[Bugfix][ROCm] Pre-allocate wvSplitKrc static workspaces before KV init (#54247)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Kimi Code <noreply@moonshot.ai>
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2026-08-28 14:22:53 -07:00 |
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xuebwang-amd
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06569a8696
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[ROCm][Quantization][MOE] Enable fused shared experts for block-quantized FP8 (#53097)
Signed-off-by: xuebwang-amd <xuebwang@amd.com>
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2026-08-28 09:23:07 -07:00 |
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maobaolongandCodex
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6f7df92a8e
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[CPU][MLA] Fix prefill backend selection so MLA runs end-to-end on CPU (#51471)
Signed-off-by: baoloongmao <baoloongmao@tencent.com>
Co-authored-by: Codex <codex@openai.com>
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2026-08-28 12:36:55 +08:00 |
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Thien Tran
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6ec92bcbc8
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[Kimi-K3] Merge MLA gate into QKV-A projection (#54015)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-08-27 17:47:18 -07:00 |
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7c877062ac
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[kernel] Integrate FlashInfer BF16 CuTeDSL Low Latency GEMM (#50572)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-08-27 22:29:12 +00:00 |
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Matthew BonanniandOpenAI Codex
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de9250ac9e
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[Attention] Enable masked MHA for GLM-5 head dimensions (#53785)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-08-27 21:17:12 +00:00 |
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