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92ccd2c306
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[Bugifx][INC] Fix INC quantization method selection for non-quantized layers (#47237)
Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-01 10:40:47 +00:00 |
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Zhenzhong XuandKunshang Ji
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bd575a0d0b
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[AutoRound] Support AutoRound Format Block-Wise FP8 in vLLM (#47434)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-31 22:56:20 +08:00 |
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jl9876andKunshang Ji
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1b9539d37c
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[Quantization][Autoround][XPU] Support AutoRound MXFP8 MoE models (#51248)
Signed-off-by: jl9876 <jia.li@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-31 16:37:01 +08:00 |
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Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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a5e0045433
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[Refactor] Remove dead code quantization 2 (#52821)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-25 20:28:44 -07:00 |
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Luke Alonsoandmgoin
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2740c817ff
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[Kernel] Add b12x FP4 MoE backend (#52018)
Signed-off-by: Luke Alonso <lalonso@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-08-21 08:04:36 -07:00 |
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Thanaji Rao ThakkalapelliandKunshang Ji
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9fd750f00d
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[XPU][INC] Add int4 w4a8 (dynamic int8 activation) backend for INC linear layers (#50501)
Signed-off-by: Thanaji Rao Thakkalapelli <thanaji.rao.thakkalapelli@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-21 14:38:59 +08:00 |
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Wentao Ye
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7d7b6f26f4
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[Refactor] Remove dead code for quantization (#52221)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-08-16 13:10:16 -04:00 |
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7c77868cdf
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[Bugfix] Size and iterate w13 by shard count for non-gated MoE (#51125)
Signed-off-by: aoshen02 <aoshen@inferact.ai>
Co-authored-by: Matej Sirovatka <matej.sirovatka@gmail.com>
Co-authored-by: Rishi Puri <riship@nvidia.com>
Co-authored-by: Hsiao-Yuan Chen <littlecircle0730@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-08-05 17:24:47 -07:00 |
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Qiming Zhang
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2755489a26
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[INC] fix w4a4 model (#50807)
Signed-off-by: mayuyuace <qiming1.zhang@intel.com>
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2026-08-03 14:28:58 +08:00 |
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lkkandKunshang Ji
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e5f48dfda2
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[Quantization][Autoround][XPU] Add W4A16(moe) / MXFP4(linear/moe) Support (#47124)
Signed-off-by: lkk12014402 <kaokao.lv@intel.com>
Signed-off-by: lkk <33276950+lkk12014402@users.noreply.github.com>
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-30 09:52:13 +08:00 |
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Xin HeandKunshang Ji
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948107acf7
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[Bugfix] Enhance extra_config handling for layer name suffix matching (#48589)
Signed-off-by: Xin He <xin3.he@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-28 20:37:55 +08:00 |
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5d07e268b1
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[Quantization][INC]Add MXFP8 Linear Support (#47514)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Yi Liu <yi4.liu@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-27 14:26:31 +08:00 |
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Zhenzhong XuandKunshang Ji
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0b0ef8d7eb
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[Quantization][INC][ARK] Support INT2 XPU WOQ Linear (#47521)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-07-14 08:29:45 +08:00 |
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Zhenzhong Xuandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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d9c1767cd4
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[INC][ARK] Direct Register Custom Op for ARK (#46361)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-07-06 13:45:50 +08:00 |
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Liangliang Ma
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3da4a1b124
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[XPU] add awq format for INCXPULinear (#43404)
Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>
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2026-06-22 22:29:13 +08:00 |
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8d4f54966c
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fix(quantization): Fix AWQ dequantize on Intel XPU and refactor AutoAWQ config (#42727)
Signed-off-by: Alex <alex.tech.lab@outlook.com>
Signed-off-by: AlexHuang <jihuihuang@tencent.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-18 20:12:28 +08:00 |
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bcb518ad7a
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[quant][autoround]Refactor INC quantization into package with INCScheme orchestrator (#40601)
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: n1ck-guo <heng.guo@intel.com>
Co-authored-by: Zhenzhong1 <zhenzhong.xu@intel.com>
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2026-06-17 21:51:32 +08:00 |
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