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7d99c2c4fd
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[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-20 08:11:01 -07:00 |
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Misha GoinandErinYin
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e5fce7b56b
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[Core][Kernel] Share persistent workspaces for Marlin and Humming (#57421)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: ErinYin <liang.yin@daocloud.io>
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2026-09-20 17:28:33 +08:00 |
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Yuwen ZhouandLi, Jiang <jiang1.li@intel.com>
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b346479065
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[CPU] Add CPU FP8 W8A8 linear/MoE support (#49942)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-18 17:59:42 +08:00 |
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Thien TranandCodex
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8da75d6190
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C3x SM100 FP8 blockwise - Pad activation scales to multiple of 4 (#57377)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-18 08:39:27 +00:00 |
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Misha Goin
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9a5bd373cf
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[CI] Retire Weight Loading smoke tests (#57398)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-17 16:04:03 -04:00 |
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afriedri
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a9a7e45f31
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[ROCm] Restore VLLM_ROCM_USE_AITER_FP4_ASM_GEMM and default w4a4 ASM GEMM back to off (#57055)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
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2026-09-17 13:39:52 -05:00 |
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Harry MellorandClaude Opus 5
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651a88c09a
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[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 10:57:24 -07:00 |
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Harry MellorandClaude Opus 5
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8c1557a79c
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Add pydocstyle to the ruff rules (#52136)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: Harry Mellor <hej.mellor@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 16:44:29 +00:00 |
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Li, Jiang
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b68408043d
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[Bugfix][CPU] Add per-tensor FP8 W8A16 kernel to fix Ministral crash on CPU (#56985)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-16 15:49:17 +08:00 |
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bb55077411
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[Perf][Kernel] Integrate Mega-mHC from DeepGEMM for DeepSeek V4.1 (reopen of #56255) (#56962)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Juntian Liu <Juntianl777@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-09-15 04:01:06 -07:00 |
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Netanel Haber
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d4ee7fe7a9
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[Quantization] Select linear backends per quantization (#51204)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
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2026-09-14 16:24:18 -04:00 |
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Matthias Gehre
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dc2e8f1157
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[ROCm][Perf] W4A16: keep skinny GEMM zero-points packed 4-bit (#54965)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
|
2026-09-14 17:40:25 +08:00 |
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Ayushman SinghandAyushman Singh
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c2ea9f1a5f
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[Kernel][Perf][Quantization] Fix odd-row performance cliff in per-token-group quantization (#56478)
Signed-off-by: Ayushman Singh <ayush1399@users.noreply.github.com>
Co-authored-by: Ayushman Singh <ayush1399@users.noreply.github.com>
|
2026-09-12 20:27:08 -07:00 |
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JartX
|
986e2f870a
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[Refactor][ROCm] Migrate the RDNA3 W4A16 MoE to the oracle/experts pa… (#55522)
Signed-off-by: JartX <sagformas@epdcenter.es>
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2026-09-12 21:20:26 +08:00 |
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e77daef89e
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[Model] Support DeepSeek-V4.1-Flash (#56214)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
|
2026-09-11 02:11:19 -07:00 |
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pmanczak
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6376c601ed
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[XPU][Tests] Enable test_per_token_group_quant_int8 on XPU (#55681)
Signed-off-by: pmanczak <pawel.manczak@intel.com>
|
2026-09-11 15:59:13 +08:00 |
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MattandClaude Opus 5
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9163190dda
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[ROCm][Bugfix][Perf] Tune multi-stream shared experts use; wvSplitKrc fixes (#56098)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-10 15:14:22 -07:00 |
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Yongye ZhuandClaude Opus 5
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be1cb9834b
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[Kernel] Optional Q-norm in fused DSv4 MLA epilogue; group_size=32 for packed FP8 quant (#56215)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-10 00:35:59 -07:00 |
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Colin Z
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588a813a60
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[ROCm] [BugFix] Fix AITER MXFP4 ASM-GEMM crash on unfused shared experts (#55213)
Signed-off-by: Colin Zeng <Colin.Zeng@amd.com>
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2026-09-10 05:23:36 +00:00 |
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Roderick Wuandmgoin
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2c9d68f80b
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[Quant][Kernel] Remove GPTQ Group/Dynamic Activation Ordering (#54809)
Signed-off-by: Roderick-Wu <roderickwu2003@gmail.com>
Signed-off-by: Roderick Wu <roderickwu2003@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-08 12:45:12 -07:00 |
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Raya Elena Solanoandmgoin
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bcca76e7db
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[Test] Dequantize NVFP4 KV cache scales in the layout the kernel writes (#55908)
Signed-off-by: Raya Elena Solano <raya.solano@mbinf.de>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-08 17:13:39 +00:00 |
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8ebc5b0a18
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[Bugfix] Fix NVFP4 fused SiLU+mul scale allocation and global scale direction (#55643)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: khluu <khluu000@gmail.com>
Co-authored-by: jiahao <jxia77@terpmail.umd.edu>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
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2026-09-08 08:26:07 -07:00 |
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Stefano Castagnetta
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13cf9e05c1
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[Perf][Quant][NVFP4] Prefer W4A4 linear kernels over weight-only ones on SM120/121 (#55170)
Signed-off-by: Stefano Castagnetta <scastagnetta@nvidia.com>
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2026-09-08 15:06:45 +04:00 |
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Jürgen Schmied
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4df80187b5
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[Kernel] SM 12.x blockwise FP8: swizzle the CTA raster when the weight exceeds the L2 (#55180)
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2026-09-06 17:36:59 -07:00 |
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579aef4e8d
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[ROCm] Bump AITER to 0.1.21.post1 (#52826)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: fai <fangzhouai@gmail.com>
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2026-09-03 16:28:40 -07:00 |
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Luke Alonso
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1945a94575
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[Bugfix][Tests] Stabilize B12X linear kernel checks (#54996)
Signed-off-by: Luke Alonso <lalonso@gmail.com>
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2026-09-02 18:46:08 +00:00 |
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ee3c00bbf4
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[Performance] Register Triton W4A16 GEMM as a custom op (#51453)
Signed-off-by: giuseppegrossi <ggrossi@amd.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-01 22:55:34 -05:00 |
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514c7314a0
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[Perf][Kernel] Initialize NVFP4 padding in quant kernel (#53568)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-01 09:49:07 -07:00 |
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Lain
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882ca8d696
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[Kernel] add Flashinfer cutedsl w4a16 linear (#53014)
Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
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2026-09-01 02:49:14 +00:00 |
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afriedriandAndreas Karatzas
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2f1cba799e
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[ROCm] remove VLLM_ROCM_USE_AITER_FP4_ASM_GEMM environment variable; make w4a4 use the preshuffle triton+asm by default (#53141)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Signed-off-by: afriedri <afriedri@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-28 18:59:53 +00:00 |
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Luke Alonsoandmgoin
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2740c817ff
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[Kernel] Add b12x FP4 MoE backend (#52018)
Signed-off-by: Luke Alonso <lalonso@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-08-21 08:04:36 -07:00 |
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SeonjinandMisha Goin
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bd8865a299
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[Kernel] Add FlashInfer TRTLLM MXFP8 linear backend (#52204)
Signed-off-by: seonjinn <sna@nvidia.com>
Signed-off-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
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2026-08-20 10:07:22 -04:00 |
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pmanczak
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44cf3f0466
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[XPU][Tests] Make tests device-agnostic (#51968)
Signed-off-by: pmanczak <pawel.manczak@intel.com>
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2026-08-20 02:25:41 -07:00 |
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Andreas KaratzasandOpenAI Codex
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5fa8ca971a
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[ROCm][CI] Move ROCm AITER quantization tests (#40938)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-18 14:50:35 +08:00 |
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Misha Goin
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4ab5e5012a
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[Refactor] Simplify B12X linear kernels and warmup (#52368)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-08-17 09:45:45 -07:00 |
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qli88
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1d3a8b9e22
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[ROCm][Bugfix] Fix Triton W4A16 bug in determining if transpose is required for GPTQ/AutoGPTQ (#48998)
Signed-off-by: Qiang Li <qiang.li2@amd.com>
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2026-08-17 12:26:05 +00:00 |
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Wentao Ye
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7d7b6f26f4
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[Refactor] Remove dead code for quantization (#52221)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-08-16 13:10:16 -04:00 |
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Luke Alonso
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3c79b1a8bf
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[Kernel] Add B12X dense linear backends (#52016)
Signed-off-by: Luke Alonso <lalonso@gmail.com>
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2026-08-13 19:48:33 -07:00 |
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19d61b1273
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[Bugfix] Initialize DeepGemmQuantScaleFMT oracle lazily; bound QuantFP8 UE8M0 packed path to group_size 128 (#51359)
Signed-off-by: BabyDrangoner <148877251+BabyDrangoner@users.noreply.github.com>
Signed-off-by: kiroxu <148877251+BabyDrangoner@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-08-12 14:27:50 -04:00 |
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Micah WilliamsonandAndreas Karatzas
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045a986f3b
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[ROCm][CI] Speed Up ROCm Skinny GEMM Tests (reduced parameterizations, (#51877)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-12 01:40:13 +00:00 |
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Andreas KaratzasandOpenAI Codex
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1ab2801dde
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[ROCm] Remove stale SDPA and skinny GEMM workarounds (#50907)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-11 14:19:16 -04:00 |
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Lena OnyshchenkoandKunshang Ji
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751f2ccdd3
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[Kernel][XPU] Tensor-descriptor operand loads for Triton W8A8 scaled_mm (#47205)
Signed-off-by: oonyshch <xonyshch@gmail.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-10 00:56:11 +00:00 |
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fxmarty-amd
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3518110f2f
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[Online quantization] Add online MXFP4 quantization support (#49347)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
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2026-08-07 12:39:46 -07:00 |
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pmanczakandpmanczak
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6b5bec7bed
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[Misc] Add and enable Triton kernel unit tests on XPU (#45694)
Signed-off-by: pmanczak <pmanczak@users.noreply.github.com>
Signed-off-by: pmanczak <pawel.manczak@intel.com>
Co-authored-by: pmanczak <pmanczak@users.noreply.github.com>
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2026-08-07 02:53:03 -07:00 |
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zofiaandKunshang Ji
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8060260e1d
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[Linear] [Kernel] add block-wise scaled_mm (#49932)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-08-06 14:40:26 +08:00 |
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Micah WilliamsonandAndreas Karatzas
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4282fe52d5
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[ROCm][CI] Add More AITER quantization/MoE kernel tests (#49375)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-08-05 21:27:33 +00:00 |
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454ea5b526
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[MoE Refactor] Combine CompressedTensorsWNA16MarlinMoEMethod with CompressedTensorsWNA16MoEMethod (#44570)
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: Taneem Ibrahim <taneem.ibrahim@gmail.com>
Signed-off-by: Dobrzyniewicz, Agata <agata.dobrzyniewicz@intel.com>
Signed-off-by: Tushar Jain <tushar00jain@users.noreply.github.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Taneem Ibrahim <taneem.ibrahim@gmail.com>
Co-authored-by: Agata Dobrzyniewicz <160237065+adobrzyn@users.noreply.github.com>
Co-authored-by: Tushar Jain <8455015+tushar00jain@users.noreply.github.com>
Co-authored-by: Tushar Jain <tushar00jain@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2026-07-31 14:13:03 -07:00 |
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fxmarty-amd
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e67a2e0a56
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[ROCm][Quark][7/N] Use MXFP4 linear kernel abstraction for emulation backend (#48949)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
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2026-07-31 10:07:15 -07:00 |
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stefankoncarevicandAndreas Karatzas
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2773ec31b3
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[ROCm][CI] Use explicit wvSplitKrc skinny-GEMM test tolerance for bf16 (gfx950) (#49309)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-30 22:25:42 -05:00 |
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fxmarty-amdandAndreas Karatzas
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7aea73d83d
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[ROCm][Quark][6/N] Use MXFP4 linear kernel abstraction for aiter backend (#49348)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-27 21:35:57 -05:00 |
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