Commit Graph
3038 Commits
Author SHA1 Message Date
Wei Zhao 6748217fb9 [Bugfix] Fix Kimi K3 NVFP4 MoE weight conversion OOM (#55407)
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
2026-09-07 11:45:25 +08:00
de69e821b7 [ROCm][Perf][DeepSeek V4] Fuse native FP8 shared expert with MXFP4 routed experts (#53161)
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Cursor Agent <agent@cursor.com>
2026-09-06 19:42:21 -07:00
Wenhua Cheng 294fbb4f59 add 2/3/5/6/7 CUDA support in AutoRound format (#52890)
Signed-off-by: Wenhua Cheng <wenhua.cheng@intel.com>
2026-09-07 09:59:19 +08:00
Jee Jee Li 199cb9b964 [Kernel] Remove unused fake implementation (#55535)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
2026-09-06 17:54:32 -07:00
Baki Burak Öğün f2e2936f91 [Kernel] Add fused MoE tuned config for E=256,N=512 on NVIDIA A100 80GB PCIe (#55511)
Signed-off-by: Baki Burak Ogun <63836730+bakiburakogun@users.noreply.github.com>
2026-09-06 03:15:01 +00:00
Wei ZhaoandOpenAI Codex 16328c7a77 [Perf] Kimi K3 nvfp4 Align in_proj weights by 128 to avoid elementwise copy (#55242)
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-05 10:46:47 +08:00
385ba6b5b0 [Bugfix][Quantization] Register Quark per-block FP8 scales as weight_scale (#54770)
Signed-off-by: jimmy-adams <41593649+jimmy-adams@users.noreply.github.com>
Co-authored-by: fxmarty-amd <felmarty@amd.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
2026-09-05 10:44:24 +08:00
Nick Hill 8277c42e4c [Perf] Ensure async h2d copies are pinned in more places (#55202) 2026-09-04 17:17:01 -07:00
5690b02c03 [Quantization] Support online quantization with partially pre-quantized checkpoints (#51392)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
2026-09-04 11:46:06 -07:00
yzyyzyhhhandyaozhiyuan.666 1ff5edb023 [Bug-fix] Fix MoE fused sum row offsets (#50220)
Signed-off-by: yaozhiyuan.666 <yaozhiyuan.666@bytedance.com>
Co-authored-by: yaozhiyuan.666 <yaozhiyuan.666@bytedance.com>
2026-09-04 09:39:02 -07:00
f19431e5c8 [Bugfix][MoE] Allow TRTLLM FP8 block-scale MoE with SwiGLU clamp (#55069)
Signed-off-by: aoshen02 <aoshen02@users.noreply.github.com>
Co-authored-by: aoshen02 <aoshen524@gmail.com>
Co-authored-by: aoshen02 <aoshen02@users.noreply.github.com>
Co-authored-by: Codex <noreply@openai.com>
2026-09-04 08:34:21 -07:00
a69e75b9b6 Fast Start (#54921)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: liusy58 <liusy58@smail.nju.edu.cn>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
2026-09-04 06:32:06 -07:00
579aef4e8d [ROCm] Bump AITER to 0.1.21.post1 (#52826)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: fai <fangzhouai@gmail.com>
2026-09-03 16:28:40 -07:00
Fangzhou Ai 8bf39632b8 [ROCm][Perf] Add low-M FP32 router GEMM for gfx950 (#54845) 2026-09-03 10:42:25 -07:00
b7624069ff [Fusion] Manual ActivationQuantFusionPass initial application (#51415)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: ElizaWszola <ewszola@redhat.com>
2026-09-03 13:37:31 -04:00
Bolin SunandClaude Fable 5 d410fc12f3 [Kernel] Enable Kimi-K3 SiTU on the CuteDSL MoE backend and the SM107 low-latency GEMM plan (#54606)
Signed-off-by: Bolin Sun <bolins@nvidia.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-09-03 16:49:31 +00:00
Jiangyun Zhu 98ed0856f3 [Model] add GLM-5.3-Flash support (#53906) 2026-09-03 09:40:35 -07:00
Zhaodong BingTJianZhaodong BingCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>Zhaodong Bing
5d09eb2cf3 [Bugfix][MoE] Preserve unquantized weight storage on ROCm (#46009)
Signed-off-by: bingzhaodong <aaab8b@gmail.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2c5.prov.aus.ccs.cpe.ice.amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Zhaodong Bing <zhaobing@smc300x-ccs-aus-gpuf2a0.prov.aus.ccs.cpe.ice.amd.com>
2026-09-03 11:06:09 +08:00
a0d3e5c16e [XPU] Add fused GemmaRMSNorm path for eager execution (#53678)
Signed-off-by: Huanxing <huanxing.shen@intel.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-03 06:11:20 +08:00
Isotr0py 1356635d83 [New model][Multimodal] Add DeepSeek-V4-Flash-Vision-Exp support (#54566)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
2026-09-02 11:09:09 -07:00
Harry MellorandClaude Opus 5 d539de1c5d [Docs] Add missing return annotations flagged by griffe (#54980)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
2026-09-02 09:56:07 -07:00
Tomasz Zielinskimergify[bot] <37929162+mergify[bot]@users.noreply.github.com>Claude Opus 5Harry Mellor
ffe3bb3c72 [Hardware][XPU] Register matmul and linear batch-invariant kernels for XPU (#49209)
Signed-off-by: tzielinski-habana <tomasz.zielinski@intel.com>
Signed-off-by: Tomasz Zielinski <85164140+tzielinski-habana@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
2026-09-02 13:31:38 +00:00
fxmarty-amd 7894394b07 [Online quantization] Add targeted online quantization configuration based on user patterns (#51285) 2026-09-02 08:55:15 -04:00
Micah Williamson ce6a283c09 [Bugfix] Restore weight_dtype in QuarkW8A8Fp8MoEMethod to fix GPT-OSS FP8 MoE weight loading (#54824)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
2026-09-01 16:08:11 -05:00
7a977c0699 [ModelOpt] Redesign the LinearMethod classes using the generic QuantKey-driven method (#49381)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
2026-09-01 16:28:56 -04:00
stefankoncarevic 73723b707f [ROCm][MoE] Fix gfx950 block scale swizzle for AITER Triton MXFP4 W4A16 (#54773)
Signed-off-by: Stefan Koncarevic <Stefan.Koncarevic@amd.com>
2026-09-01 19:48:45 +00:00
Julien Debache ab54f5bd83 [Chore] Remove redundant _pack_topk_ids_weights_kernel in TrtLLM NvFP4 MoE (#46872)
Signed-off-by: jdebache <jdebache@nvidia.com>
2026-09-01 15:30:11 -04:00
2fe5cef35e [Fix] Fix FSE compatibility detection for Quark-produced models (#54573)
Signed-off-by: xuebwang-amd <xuebwang@amd.com>
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: xuebwang-amd <xuebwang@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-01 12:12:20 -05:00
Misha GoinandOpenAI Codex 82b7d49a6e [MoE] Generalize masked activation for padded layouts (#51217)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-01 11:34:13 -04:00
Andrii SkliarandAndrii Skliar adebc41b7e [Mamba] Add FlashInfer ReplaySSM backend (#52506)
Signed-off-by: Andrii Skliar <askliar@nvidia.com>
Signed-off-by: Andrii Skliar <andreyws96@gmail.com>
Co-authored-by: Andrii Skliar <askliar@nvidia.com>
2026-09-01 10:26:43 -04:00
Liang LvKunshang Jimergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
92ccd2c306 [Bugifx][INC] Fix INC quantization method selection for non-quantized layers (#47237)
Signed-off-by: lvliang-intel <liang1.lv@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 10:40:47 +00:00
Ganesh RCursormergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
8f03625b3d [CPU][Zen] Route Int8 MoE inference through zentorch on AMD (#44834)
Signed-off-by: R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-09-01 09:31:31 +00:00
fxmarty-amdandAndreas Karatzas 63988f3c2d [Quantization][Refactor][1/N] Adopt QuantKey in QuarkConfig and methods, relying on weight_quant_key, act_quant_key for quant method dispatch (#52958)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-09-01 02:55:54 -05:00
sychen52 7c5dc571cb [Attention][DSA] Enable W4A16 DSA (#51724)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
2026-09-01 12:37:47 +08:00
afriedriandAndreas Karatzas dc9114b201 [ROCm][MoE] Split AITER CK and Triton MXFP4 W4A16 into separate backends (#50622)
Signed-off-by: afriedri <afriedri@amd.com>
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
2026-08-31 23:14:14 -05:00
Roberto L. CastroandCodex e16b5e518d [1/N][warmup][DSv4] Migrate generic MLA metadata and indexing kernels (#50175)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
2026-08-31 23:26:05 -04:00
Lain 882ca8d696 [Kernel] add Flashinfer cutedsl w4a16 linear (#53014)
Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
2026-09-01 02:49:14 +00:00
4c21d41733 [XPU] Route activation CustomOps to SYCL kernels (#53734)
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-09-01 09:19:52 +08:00
Roberto L. CastroCodexmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
f5c3cc240b [Perf][Kernel] Tune cooperative topk for medium batch-sizes (#53382)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2026-08-31 13:44:38 -07:00
Zhenzhong XuandKunshang Ji bd575a0d0b [AutoRound] Support AutoRound Format Block-Wise FP8 in vLLM (#47434)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-31 22:56:20 +08:00
Jee Jee Li e2c8eeac40 [kernel] Fused embedding kernel (#53677)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
2026-08-31 11:34:14 +00:00
jl9876andKunshang Ji 1b9539d37c [Quantization][Autoround][XPU] Support AutoRound MXFP8 MoE models (#51248)
Signed-off-by: jl9876 <jia.li@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-31 16:37:01 +08:00
zofiaandopencode 2a61f060d3 [XPU] Ensure unquantized linear weight is N-contiguous (#53536)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Co-authored-by: opencode <noreply@opencode.ai>
2026-08-31 16:01:24 +08:00
Li, Jiang fdbf2ddbd2 [Bugfix][CPU] Fix several bugs (#54042)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2026-08-31 15:33:06 +08:00
Jee Jee Li 8e92248f79 [Kernel] Retire the DSv3 router GEMM CUDA kernel (#54040)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
2026-08-31 07:15:31 +00:00
+5 e126687a9a [Model] Support Qwen3.8-Flash-Next (#53896)
Signed-off-by: huanghaoyan.hhy <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: lishunyang12 <lishunyang03@gmail.com>
Signed-off-by: Harry Huang <huanghaoyan.hhy@alibaba-inc.com>
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Yifan Qiao <yifanqiao@inferact.ai>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: KungYork <firelikest@163.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: andyluo7 <43718156+andyluo7@users.noreply.github.com>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: lishunyang12 <lishunyang03@gmail.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-08-31 05:57:56 +00:00
7ab2923489 [Flashinfer] Upgrade Flashinfer version to 0.6.18 (#54313)
Signed-off-by: wzhao18 <wzhao18.sz@gmail.com>
Signed-off-by: Wei Zhao <51183510+wzhao18@users.noreply.github.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
2026-08-30 16:01:05 -07:00
Aditya JhaandClaude 9d0fe9bac8 [Bugfix][Quantization][MoE] Route weight only NVFP4 checkpoints through W4A16 (#54427)
Signed-off-by: Aditya Jha <4adityajha@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
2026-08-30 13:02:15 -04:00
Jiangyun ZhuandOpenAI Codex 8c51b92654 [Bugfix] Avoid global config lookup in sparse indexer forward (#54400)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-08-30 03:31:47 -07:00
Simon Danielssonmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>Shanshan Shen
2c7d7dd64a [Perf][ROCm] Dual-stream decode with hipgraphs (#52033)
Signed-off-by: simondanielsson <simon.danielsson99@hotmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
2026-08-30 08:24:20 +00:00