 Harry Huangandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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c75cb63cd2
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[Qwen4Exp] support Sequence Parallelism for Qwen3.8-Flash-Next (#56322)
Signed-off-by: huanghaoyan.hhy <huanghaoyan.hhy@alibaba-inc.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-10-12 20:56:44 +08:00 |
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Miłosz GrunwaldandKunshang Ji
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be0823357f
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[TEST][XPU][CI] Fix ci uva kernel test instability 2 (#60404)
Signed-off-by: microslaw <milosz.grunwald@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-10-10 12:09:13 +08:00 |
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956960f85f
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[Perf][MRV2] Avoid stream syncs in NonUvaBuffer host-to-device copies (#60215)
Signed-off-by: cheesecake <farzanaman99@gmail.com>
Co-authored-by: William Joyner <133391209+joynerwk03@users.noreply.github.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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2026-10-07 01:51:12 +00:00 |
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4e198cef83
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[TEST][XPU][CI] Fix ci uva kernel test instability (#60041)
Signed-off-by: Your Name <you@example.com>
Co-authored-by: Your Name <you@example.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-10-06 09:19:01 +08:00 |
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Chaojun Zhang
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7230dfea50
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[XPU] Preserve non-contiguous strides when pinning CPU tensors for UVA view (#54874)
Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
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2026-09-29 09:43:07 +08:00 |
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stefankoncarevicandAndreas Karatzas
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6c300ddb9e
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[CI][Bugfix] Relax packed_qk_rope_ correctness test to one ULP (#59008)
Signed-off-by: Stefan Koncarevic <stefan.koncarevic@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-28 17:29:59 +00:00 |
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Thien Tran
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39d49539de
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[KimiViT][Perf] Fuse per-layer QK RoPE into one in-place kernel (#58651)
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2026-09-27 18:18:06 -07:00 |
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Samuel Kimandmgoin
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f55419c43c
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[Bugfix][Quantization] Fix MXFP8 startup crash on layers below mm_mxfp8 shape limits (#54223)
Signed-off-by: samuelkim7 <samuelmwkim@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-25 02:54:11 +00:00 |
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16070ed7e9
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[Minimax-M3][Perf] Use triton_mrope for vision tower + int64 offset fix for triton_mrope (#58526)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Kimi <noreply@moonshot.cn>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-09-24 18:30:32 -07:00 |
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vllm-agentandkimi-no-na-wa
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955bd6abef
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[CI][Bugfix] Extend groupwise rms_norm scale tolerance to CUDA (#58252)
Signed-off-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
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2026-09-23 01:29:11 -07:00 |
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Michał GanczarenkoandClaude
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73c59d365b
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[XPU] Wire up SYCL apply_rotary_emb kernel in ApplyRotaryEmb (#55721)
Signed-off-by: Michal Ganczarenko <michal.ganczarenko@intel.com>
Signed-off-by: Michał Ganczarenko <michal.ganczarenko@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-09-22 20:43:24 -07:00 |
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d110c2f19c
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[ROCm] Use silu_and_mul_with_clamp's torch._C op (#52052)
Signed-off-by: Tres Popp <tres.popp@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-22 18:30:14 -05:00 |
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7d99c2c4fd
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[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-20 08:11:01 -07:00 |
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Harry MellorandClaude Opus 5
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651a88c09a
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[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 10:57:24 -07:00 |
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Harry MellorandClaude Opus 5
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8c1557a79c
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Add pydocstyle to the ruff rules (#52136)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: Harry Mellor <hej.mellor@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 16:44:29 +00:00 |
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MattandAndreas Karatzas
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b3b13c1292
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[ROCm][CI] Fix MLA RoPE fused-kernel tests for TheRock image (#57112)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-16 05:57:40 +00:00 |
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Bugen Zhao
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cf1584f373
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[Refactor] Normalize DeepSeek V4.1 model package naming (#56741)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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2026-09-13 23:17:50 -07:00 |
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e77daef89e
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[Model] Support DeepSeek-V4.1-Flash (#56214)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Signed-off-by: andyluo7 <andy.luo@amd.com>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: andyluo7 <andy.luo@amd.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-11 02:11:19 -07:00 |
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bjf-frzandNick Hill
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2e0ee66cab
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[Perf] Use UVA-backed contents for MRV2 apply_write (#55819)
Signed-off-by: bjf-frz <frz123db@gmail.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
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2026-09-10 07:27:16 -07:00 |
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Harry MellorandClaude Opus 5
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719284fe15
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[Core][Model] Unify XD-RoPE into M-RoPE and derive the channel count (#56078)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-09 09:23:30 -07:00 |
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Roderick Wuandmgoin
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2c9d68f80b
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[Quant][Kernel] Remove GPTQ Group/Dynamic Activation Ordering (#54809)
Signed-off-by: Roderick-Wu <roderickwu2003@gmail.com>
Signed-off-by: Roderick Wu <roderickwu2003@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-08 12:45:12 -07:00 |
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Roberto L. CastroandCodex
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6ddbab03de
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[4/N][warmup][DSv4] Migrate common attention kernels (#50176)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Co-authored-by: Codex <codex@openai.com>
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2026-09-08 10:25:48 -04:00 |
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Andreas Karatzas
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096d8e8ce6
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[ROCm][CI] Add MiniMax reduce RMS kernel coverage (#55057)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-03 04:07:59 -05:00 |
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Divakar VermaandAndreas Karatzas
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c0adee9231
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[ROCm][CI] Add ROCm misc ops and env tests (#53279)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-01 19:03:37 +00:00 |
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Misha GoinandOpenAI Codex
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82b7d49a6e
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[MoE] Generalize masked activation for padded layouts (#51217)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-09-01 11:34:13 -04:00 |
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Jee Jee Li
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e2c8eeac40
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[kernel] Fused embedding kernel (#53677)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-31 11:34:14 +00:00 |
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06cccf8730
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[Bugfix] Fix int32 token offset overflow in fused SiLU block quant (#53409)
Signed-off-by: Anni <dranox2222@gmail.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-08-28 16:23:36 -04:00 |
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Roy WangandClaude Fable 5
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b74ac0bc61
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[Bugfix] Allocate packed outputs in fused_q_kv_rmsnorm so q_b_proj keeps its low-latency GEMM path at decode (#53109)
Signed-off-by: yasong.wang <yasong.wang@inferact.ai>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-08-28 02:08:27 +00:00 |
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Misha GoinandOpenAI Codex
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5bbc58c0ad
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[Bugfix] Remove race in fused groupwise RMSNorm quantization (#54111)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-08-27 19:01:22 -07:00 |
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Chauncey
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7d5769b2d9
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[Perf][DSv4] Use native CUDA SwiGLU clamp kernel for Humming MoE (throughput +1.40%) (#53685)
Signed-off-by: chaunceyjiang <chaunceyjiang@gmail.com>
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2026-08-27 13:52:45 -07:00 |
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Shanshan Shen
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32ad1400d7
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[ROCm][Perf] Fuse SWA q/kv RMSNorm and q FP8 group quant for DeepSeek-V4 (#53540)
Signed-off-by: Shanshan Shen <87969357+shen-shanshan@users.noreply.github.com>
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2026-08-27 09:37:54 -07:00 |
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Divakar Verma
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29b7c2f7d4
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[ROCm][CI] aiter kernel ops - enable rope test (#52854)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-08-21 15:17:34 -05:00 |
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Jee Jee Li
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2687fec6ef
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Replicated embedding and norm fusion for DSV3 flat model (#48484)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-08-18 14:53:21 +08:00 |
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Divakar Verma
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49fb2ee348
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[ROCm][CI] add Aiter ops tests (#52208)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-08-17 18:33:22 -05:00 |
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bastefaniak
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71b0da7c4e
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[Bugfix] Fix .../mrope.py::apply_interleaved_rope() when torch.compile is used in torch==2.13 (#52005)
Signed-off-by: Bartosz Stefaniak <bstefaniak@nvidia.com>
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2026-08-13 22:08:40 +00:00 |
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pmanczakandpmanczak
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6b5bec7bed
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[Misc] Add and enable Triton kernel unit tests on XPU (#45694)
Signed-off-by: pmanczak <pmanczak@users.noreply.github.com>
Signed-off-by: pmanczak <pawel.manczak@intel.com>
Co-authored-by: pmanczak <pmanczak@users.noreply.github.com>
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2026-08-07 02:53:03 -07:00 |
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Rohan PotdarandClaude Opus 4.8
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38ebd97bca
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[ROCm] Relax MLA rope+cache test tolerances for bf16 (#51083)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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2026-08-05 17:50:52 -05:00 |
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Andreas Karatzas
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bdc98bf506
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[CI] Initialize fused gated RMSNorm weights (#50377)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-30 15:34:08 -04:00 |
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Martin HickeyandHarry Mellor
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38a267cdd5
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[MyPy][1/N] Fix mypy errors in some tests/ directories and enforce follow-imports=silent (#49570)
Signed-off-by: Martin Hickey <martin.hickey@ie.ibm.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-07-30 05:02:51 -07:00 |
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Andreas KaratzasandOpenAI Codex
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0c64be8873
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[Test][ROCm] Account for gfx950 FP8 RMSNorm rounding (#49839)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-07-30 18:46:37 +08:00 |
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yinfengLiu
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f1e8fd27ae
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[ROCm] Add AITER FP8 ViT encoder attention (#49937)
Signed-off-by: Liuyinfeng01 <yinfeliu@amd.com>
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2026-07-30 06:22:10 +00:00 |
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Wentao Ye
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82642d7d6c
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[Perf] RMSNorm uncontiguous support, 1.2~3.1x kernel performance improvement (#49750)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-07-29 13:45:38 -07:00 |
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+12
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7c6729b769
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[Model] Add Kimi K3 support: model files and kernels [1/N] (#50089)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Ziming Huang <zelda.huanghuang@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Isotr0py <mozf@inferact.ai>
Co-authored-by: aoshen02 <aoshen02@users.noreply.github.com>
Co-authored-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: aoshen02 <aoshen@inferact.ai>
Co-authored-by: Summer Yang <girasoleyang@gmail.com>
Co-authored-by: Kevin H. Luu <khluu000@gmail.com>
Co-authored-by: Bowen Wang <abmfy@icloud.com>
Co-authored-by: gnovack <novackgm@gmail.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai>
Co-authored-by: xiaozhoupy <peiyuanzhou1994@gmail.com>
Co-authored-by: Roy Wang <yasong.wang@inferact.ai>
Co-authored-by: Jeff (Junze) Ma <93145857+majunze2001@users.noreply.github.com>
Co-authored-by: Codex <codex@openai.com>
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2026-07-29 14:10:58 +08:00 |
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Andreas Karatzas
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05a0814863
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[ROCm] Fix and optimize GPT-J-style MRoPE (#49906)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-28 10:50:10 -06:00 |
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Andreas Karatzas
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e09900436c
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[CI][ROCm] Reduce kernel test runtime (#49915)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-27 06:44:21 +00:00 |
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Wentao Ye
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626c90b2d5
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[Refactor] Move fla to third party (#48500)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-07-16 19:22:36 +01:00 |
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Tanish MalekarandClaude Sonnet 4.6
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e26264f3ef
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[Kernel] Implement CUDA kernel for ReLUSquaredActivation (relu^2) (#39058)
Signed-off-by: Tanish Malekar <tanishmalekar32@gmail.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-07-12 19:18:03 -07:00 |
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almayneandLi, Jiang <jiang1.li@intel.com>
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89e99202f2
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[CPU][Perf]Added tanh AOR for faster gelu activations. (#44639)
Signed-off-by: Anna Mayne <anna.mayne@arm.com>
Signed-off-by: almayne <anna.mayne@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-06-30 23:24:40 -07:00 |
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Divakar Verma
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68ee8300a0
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[ROCm][CI]Fix test_concat_and_cache_mla_rope_fused on ROCm (#46409)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-06-27 12:38:13 +08:00 |
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Divakar Verma
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17a71d8702
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[ROCm][CI] Relax fused layernorm quant test tolerances for one-ULP outliers (#46658)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-06-27 10:44:29 +08:00 |
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