 
|
e83222396f
|
[ROCm][Perf] W4A16: speed up skinny GEMM decode, including speculative batches (#57199)
Signed-off-by: Robert Esclapez Garcia <robert.garcia@amd.com>
Co-authored-by: Claude Opus 4.7 <noreply@anthropic.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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2026-10-13 17:21:30 +00:00 |
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 Roberto L. CastroandClaude Opus 5.5
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7fad7db330
|
[Perf][Feat] Add generic cuteDSL LL FP32 router (GEMM) (#44343)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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2026-10-13 12:38:46 -04:00 |
|
 
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6849ca696a
|
[Quantization] Add ModelOpt IQ2_XS, IQ2_XXS, and Q8_0 support via b12x (#59604)
Signed-off-by: Andrii Skliar <askliar@nvidia.com>
Signed-off-by: Luke Alonso <lalonso@gmail.com>
Co-authored-by: Andrii Skliar <askliar@nvidia.com>
Co-authored-by: Luke Alonso <lalonso@gmail.com>
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2026-10-13 09:06:33 -07:00 |
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 Misha GoinandClaude
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d79b52b182
|
[Misc] Consolidate csrc shared headers and prune dead code (#60721)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-10-12 09:46:22 -07:00 |
|
 
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e0317b28ce
|
[Feature] Support batch invariance on ROCm (#52231)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-10-12 10:53:26 -05:00 |
|
 Guancheng FuandKunshang Ji
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acec1b1d84
|
[Bugfix][XPU] Remove stale W4A8 weight after repacking (#57511)
Signed-off-by: Guancheng Fu <guancheng.fu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-10-10 04:27:35 +00:00 |
|
 
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19c0bed584
|
[Fusion] Support 3D activation quantization fusion and enable it for Pixtral (#59612)
Signed-off-by: Jakub Zakrzewski <jzakrzewski@nvidia.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
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2026-10-09 15:12:03 +08:00 |
|
 Harry MellorandClaude Opus 5.5
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21d9758459
|
Remove Python 3.10 support now that it is EOL (#60402)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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2026-10-08 02:30:52 -07:00 |
|
00CC
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5281e49908
|
[ROCm][Perf] Enable medium-skinny dispatch in RDNAHybridW4A16LinearKernel (#52619)
Signed-off-by: tangzzycc <3081129260@qq.com>
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2026-10-07 13:21:43 +00:00 |
|
  
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d1f3d8b870
|
[Quantization] Prefer Humming before Marlin backends on SM90 (#56997)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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2026-10-06 12:31:35 -07:00 |
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Matthias Gehre
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b267fe4881
|
[ROCm][Perf] W4A16: pad gfx11 weight and activation strides (#56301)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
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2026-10-06 08:22:33 -05:00 |
|
 Stefano CastagnettaandThien Tran
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55b80221ed
|
[Perf][Qwen4Exp] Keep the HC up projection on the skinny GEMM path (#60027)
Signed-off-by: Stefano Castagnetta <scastagnetta@nvidia.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-10-05 20:09:36 +08:00 |
|
Mehmet Cagri
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08e03df940
|
[Bugfix][ROCm] Use a zero default for masked scales in the MXFP8 GEMM (#59454)
Signed-off-by: Mehmet Cagri Kaymak <mehmet.kaymak@amd.com>
|
2026-10-01 11:32:25 -05:00 |
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![mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>](/assets/img/avatar_default.png) 
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e12291d733
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[CPU][Zen] Add DA8W4 (W4A8) int4 support for dense and MoE layers (#54024)
Signed-off-by: R <Ganesh.R@amd.com>
Signed-off-by: Ganesh R <Ganesh.R@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-10-01 15:18:25 +08:00 |
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 Rukhaiya2004andLi, Jiang <jiang1.li@intel.com>
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72e7874fa6
|
[Hardware][Power] Enable W4A16 (AWQ & GPTQ) quantization on POWER10 using VSX (#59149)
Signed-off-by: Rukhaiya <bibirukhaiya123@gmail.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-30 19:44:48 +08:00 |
|
 
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e440b75bb6
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[ROCm] Bump torch 2.13, triton 3.8, torchaudio, torchvision (#50605)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: jpvillam <juan.villamizar@amd.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
Co-authored-by: jpvillam <juan.villamizar@amd.com>
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2026-09-25 14:55:52 -05:00 |
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 Lingpeng JinandAndreas Karatzas
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35f92d2abc
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[ROCm] Credit ROCm/aiter for the block32 GEMM's packed kernel and in-launch split-K (#58659)
Signed-off-by: Lingpeng Jin <103567126+valarLip@users.noreply.github.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-24 21:37:41 -07:00 |
|
 Samuel Kimandmgoin
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f55419c43c
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[Bugfix][Quantization] Fix MXFP8 startup crash on layers below mm_mxfp8 shape limits (#54223)
Signed-off-by: samuelkim7 <samuelmwkim@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-25 02:54:11 +00:00 |
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 Fangzhou AiandClaude Opus 5.5
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3059155b47
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[ROCm][Perf] MXFP8 GEMM on native 32x32 block scales for gfx950 (#58510)
Signed-off-by: fai <fangzhouai@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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2026-09-24 21:26:30 -05:00 |
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HDCharles
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9f07d023d0
|
[Quantization] Enable humming wNaM asymmetric quant (zero_point) with compressed-tensors (#46528)
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2026-09-23 10:23:11 -04:00 |
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Misha Goin
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25965ee583
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[Kernel] Remove AllSpark INT8 W8A16 GEMM backend (#58001)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-22 14:07:34 -07:00 |
|
   
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f92b78f6ef
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[Kernel][DSV4.1] Fuse MXFP8 wo_b GEMM with sequence-parallel reduce-scatter (#57428)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Canlin <canlinguosdu@gmail.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-09-22 01:07:17 -07:00 |
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 yinfengLiuandShanshan Shen
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2af05512cf
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[Kernel] Add opt-in load-time MXFP4 dequantization (#50814)
Signed-off-by: Liuyinfeng01 <yinfeliu@amd.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-22 14:51:12 +08:00 |
|
 
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7d99c2c4fd
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[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-20 08:11:01 -07:00 |
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 Misha GoinandErinYin
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e5fce7b56b
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[Core][Kernel] Share persistent workspaces for Marlin and Humming (#57421)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: ErinYin <liang.yin@daocloud.io>
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2026-09-20 17:28:33 +08:00 |
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 siyuandIsotr0py
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4cc15f2121
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[Quantization] Let ModelOpt MXFP8 layers load pre-processed weights Purpose (#57316)
Signed-off-by: liusy58 <mg21330037@smail.nju.edu.cn>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
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2026-09-19 09:16:39 +00:00 |
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 Yuwen ZhouandLi, Jiang <jiang1.li@intel.com>
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b346479065
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[CPU] Add CPU FP8 W8A8 linear/MoE support (#49942)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-18 17:59:42 +08:00 |
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meng-amd
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6df2b1a8c6
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[Quantization] Support native Quark W4A16 INT4/UINT4 exports in vLLM (#48606)
Signed-off-by: HongWei Meng <HongWei.Meng@amd.com>
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2026-09-18 17:52:46 +08:00 |
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 rasmithandShanshan Shen
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acc2ed2a5f
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[ROCm][CI][The Rock 10] Fix (MI355) Quantized Models failure on The Rock 10 with Triton 3.8.x (#54849)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-17 15:20:35 -05:00 |
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danisereb
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2bdbbc8080
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[BugFix] Fix is_supported of cutlass FP8 linear (selected and fails on A100) (#55884)
Signed-off-by: Daniel Serebrenik <daserebrenik@nvidia.com>
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2026-09-16 12:31:43 -07:00 |
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Shanshan Shen
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bc0f47cd03
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[ROCm][Bugfix] Revert #56433 + #51692 to fix accuracy breakdown for DeepSeek-V4 (#57132)
Signed-off-by: Shanshan Shen <87969357+shen-shanshan@users.noreply.github.com>
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2026-09-16 18:58:23 +00:00 |
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 Harry MellorandClaude Opus 5
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651a88c09a
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[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 10:57:24 -07:00 |
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 Rebecca LeeandCursor
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6ca2b23e22
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[ROCm] Expose kFp8DynamicTokenSym on AITER PTPC linears (#54248)
Signed-off-by: Rebecca Lee <rebecca.lee@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-16 11:48:30 -05:00 |
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 Harry MellorandClaude Opus 5
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8c1557a79c
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Add pydocstyle to the ruff rules (#52136)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Signed-off-by: Harry Mellor <hej.mellor@gmail.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-16 16:44:29 +00:00 |
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Li, Jiang
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b68408043d
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[Bugfix][CPU] Add per-tensor FP8 W8A16 kernel to fix Ministral crash on CPU (#56985)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-16 15:49:17 +08:00 |
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 JohnQinAMDandClaude Opus 5
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ef5f7cd119
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[ROCm][DSv4.1][Perf] Dequantize the MXFP8 weight once when dot_scaled cannot be used (#56560)
Signed-off-by: JohnQinAMD <yanyuan.qin@amd.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-15 09:07:26 +08:00 |
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Netanel Haber
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d4ee7fe7a9
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[Quantization] Select linear backends per quantization (#51204)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
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2026-09-14 16:24:18 -04:00 |
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Matthias Gehre
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dc2e8f1157
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[ROCm][Perf] W4A16: keep skinny GEMM zero-points packed 4-bit (#54965)
Signed-off-by: Matthias Gehre <matthias.gehre@amd.com>
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2026-09-14 17:40:25 +08:00 |
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Li, Jiang
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79f0be21ff
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[Bugfix][CPU] Fix DeepSeek-R1 (FP8 MLA + MoE) correctness on CPU backend (#56773)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-14 17:30:28 +08:00 |
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![mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>](/assets/img/avatar_default.png) Ayushman Singhandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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7bcca16729
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[Bugfix] Fix DeepGEMM FP8 warmup coverage (#56452)
Signed-off-by: Ayushman Singh <40520701+ayush1399@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-12 14:20:38 -04:00 |
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Matt
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b4da4d17ae
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[ROCm][Bugfix] Fix AITER preshuffled FP8 block-scale kernel (#56433)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-09-11 11:44:57 +00:00 |
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Simon Danielsson
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7470082f57
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[ROCm][Perf] Add bpreshuffled blockscaled fp8 GEMM (#51692)
Signed-off-by: simondanielsson <simon.danielsson99@hotmail.com>
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2026-09-10 16:18:37 +00:00 |
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 siyuandIsotr0py
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73fb19151f
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[Fast Start] Support fp4 (#55465)
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-09-10 13:22:17 +00:00 |
|
  
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9b959b8657
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[Model] DeepSeek-V4.1-Flash Model Definitions (#56228)
Signed-off-by: Roger Wang <hey@rogerw.io>
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
Co-authored-by: zjy0516 <riverclouds.zhu@qq.com>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-10 20:16:26 +08:00 |
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Li, Jiang
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c3ccc0e957
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[Model] Add DeepSeek-V4 CPU backend (#55355)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-09-10 14:14:48 +08:00 |
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Colin Z
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588a813a60
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[ROCm] [BugFix] Fix AITER MXFP4 ASM-GEMM crash on unfused shared experts (#55213)
Signed-off-by: Colin Zeng <Colin.Zeng@amd.com>
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2026-09-10 05:23:36 +00:00 |
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 Michael LazosandOpenAI Codex
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28a73ccfba
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[Kernel] Add NVFP4 support to the torch linear backend (#53319)
Signed-off-by: Michael Lazos <mlazos@meta.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-09-08 20:30:05 -04:00 |
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 Roderick Wuandmgoin
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2c9d68f80b
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[Quant][Kernel] Remove GPTQ Group/Dynamic Activation Ordering (#54809)
Signed-off-by: Roderick-Wu <roderickwu2003@gmail.com>
Signed-off-by: Roderick Wu <roderickwu2003@gmail.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-08 12:45:12 -07:00 |
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Stefano Castagnetta
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13cf9e05c1
|
[Perf][Quant][NVFP4] Prefer W4A4 linear kernels over weight-only ones on SM120/121 (#55170)
Signed-off-by: Stefano Castagnetta <scastagnetta@nvidia.com>
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2026-09-08 15:06:45 +04:00 |
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Jee Jee Li
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199cb9b964
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[Kernel] Remove unused fake implementation (#55535)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-09-06 17:54:32 -07:00 |
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