 Pavani Majety
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3e10262356
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Revert "[SM100] Enable fp8 compute for prefill MLA (#30746)" (#31197)
Signed-off-by: Pavani Majety <pmajety@nvidia.com>
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2025-12-22 18:15:33 -08:00 |
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Pavani Majety
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b10f41c894
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[SM100] Enable fp8 compute for prefill MLA (#30746)
Signed-off-by: Pavani Majety <pmajety@nvidia.com>
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2025-12-22 19:15:57 +00:00 |
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Jinzhen Lin
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7c73ceb581
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[Quantization] add marlin w4a8/w8a8 check (#31061)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
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2025-12-20 21:58:11 +00:00 |
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Jinzhen Linandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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ee52d9901d
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[Quantization] support logical_widths for fp8 marlin (#30962)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2025-12-20 12:02:57 -08:00 |
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Wentao Ye
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3bd8335bd0
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[Refactor] Refactor for DeepGemmQuantScaleFMT using cache (#30898)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-19 13:50:39 -07:00 |
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969bbc7c61
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[Model] Add MiMo-V2-Flash support (#30836)
Signed-off-by: Abatom <abzhonghua@gmail.com>
Signed-off-by: Jumiar <liuanqim10@126.com>
Signed-off-by: Zyann7 <zyann7@outlook.com>
Co-authored-by: Jumiar <liuanqim10@126.com>
Co-authored-by: Zyann7 <zyann7@outlook.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-12-19 17:17:03 +00:00 |
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Jinzhen Lin
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5fbfa8d9ef
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[Quantization] fix marlin w8a8 check (#30961)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
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2025-12-19 07:33:22 -08:00 |
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Jinzhen Lin
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9187de9fac
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[Quantization] enable compressed-tensors marlin support for turing (2) (#31008)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
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2025-12-19 08:56:35 +00:00 |
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Wentao Ye
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f284d7bd0c
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[Bug] Fix AttributeError: 'ColumnParallelLinear' object has no attribute weight_scale_inv (#30823)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-17 02:00:35 -08:00 |
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jiahanc
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254a7f8fd6
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[Perf] Do FP4 quant before All gather on flashinfer trtllmgen MOE (#30014)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
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2025-12-16 13:01:48 -08:00 |
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Ming Yang
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ce12b407f2
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[TRTLLM] Remove the MoE GEMM weight name change (#30713)
Signed-off-by: Ming Yang <minos.future@gmail.com>
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2025-12-16 11:01:38 -05:00 |
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3778673ea8
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[Feat] Refactor for parallel_config in FusedMoEModularKernel (#30282)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Robert Shaw <robshaw@redhat.com>
Co-authored-by: Robert Shaw <robshaw@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2025-12-15 04:21:36 +00:00 |
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Roberto L. Castroandyoukaichao
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4fa7ce46f3
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[Feature] Add SM103 (Blackwell Ultra) Support to vLLM (#30484)
Signed-off-by: LopezCastroRoberto <robertol.c510@gmail.com>
Signed-off-by: Roberto L. Castro <38211239+LopezCastroRoberto@users.noreply.github.com>
Co-authored-by: youkaichao <youkaichao@gmail.com>
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2025-12-12 19:34:23 -08:00 |
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rasmithandRandall Smith
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08f8a5627e
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[CI/Build][Kernel][BugFix][AMD] Fix per_token_group_quant_fp8 to use correct fp8 min/max values and update atol/rtol in test_quantfp8_group_functionality (#30292)
Signed-off-by: Randall Smith <ransmith@amd.com>
Co-authored-by: Randall Smith <ransmith@amd.com>
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2025-12-12 18:41:56 -05:00 |
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Xin Yang
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1f19d8f899
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[Perf] Set split_k to 1 for triton_kernels (#30528)
Signed-off-by: Xin Yang <xyangx@amazon.com>
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2025-12-12 14:07:57 -05:00 |
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jiahanc
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0ab23c2b2b
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[fix] fix SM check for Flashinfer TRTLLM MOE (#30314)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
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2025-12-12 01:00:58 +00:00 |
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Andrew BriandandAndrew Briand
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a00d88973d
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[EPLB] Support EPLB w/ NVFP4 (#29804)
Signed-off-by: Andrew Briand <abriand@nvidia.com>
Co-authored-by: Andrew Briand <abriand@nvidia.com>
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2025-12-11 22:59:40 +00:00 |
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ElizaWszola
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2e7035dd8c
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[Bugfix] Fix fp8 DeepGemm compilation issues (#30336)
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2025-12-09 20:17:25 -05:00 |
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3c680f4a17
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[Rocm][torch.compile] Adding layernorm + fp8 block quant and silu + fp8 block quant for Aiter (#25693)
Signed-off-by: charlifu <charlifu@amd.com>
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Signed-off-by: Charlie Fu <Charlie.Fu@amd.com>
Co-authored-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: wuhuikx <hattie.wu@amd.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
Co-authored-by: Gregory Shtrasberg <156009573+gshtras@users.noreply.github.com>
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2025-12-09 22:39:26 +00:00 |
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Kyle Sayers
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fccd532587
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[Quantization] FP8 Weight Reloading for Quantized RL Rollout (#28480)
Signed-off-by: Kyle Sayers <kylesayrs@gmail.com>
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2025-12-09 13:54:32 -08:00 |
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czhu-cohere
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f6227c22ab
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[Kernel]Support W4A8 Grouped GEMM on Hopper (#29691)
Signed-off-by: czhu-cohere <conway.zhu@cohere.com>
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2025-12-08 19:29:06 -08:00 |
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Zhewen Li
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ae339b1a67
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[Bugfix] Fix DeepGEMM after #29546 (#30267)
Signed-off-by: zhewenli <zhewenli@meta.com>
Signed-off-by: Zhewen Li <zhewenli@meta.com>
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2025-12-09 01:05:27 +00:00 |
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ElizaWszolaandyewentao256
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af0444bf40
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[Performance] Fused blockwise quant RMS norm (#27883)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
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2025-12-07 16:38:04 +00:00 |
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Wentao Ye
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541a2ef892
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[Perf] Deepgemm fused layout kernel for activations, 4.3% throughput improvement, 10.7% TTFT improvement. (#29546)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-07 20:31:14 +08:00 |
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yuttian1
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c4d62618ca
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Fix AWQ MoE marlin check issue in marlin_utils.py for AMD backend (#30102)
Signed-off-by: yuttian1 <yuttian@amd.com>
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2025-12-05 20:54:38 -08:00 |
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rasmithandRandall Smith
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dc839ad03d
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[CI/Build][AMD][Quantization] Fix test_int8_kernel.py by updating int8_utils to use hip.libdevice.round (#30151)
Signed-off-by: Randall Smith <ransmith@amd.com>
Co-authored-by: Randall Smith <ransmith@amd.com>
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2025-12-05 20:52:11 -08:00 |
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Wentao Ye
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7b5575fa7d
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[Bug] Fix vLLM config is not set error (#29999)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-05 16:42:12 -05:00 |
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19bee6d12d
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[Performance][DP/EP] Add silu_mul_per_token_group_quant_fp8_colmajor kernel (#29470)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-12-03 18:04:59 +00:00 |
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1656ad3704
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[Kernel][Quantization] add w4a8 support for marlin kernel (#24722)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin@redhat.com>
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2025-11-29 07:19:33 -08:00 |
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jiahancandmgoin
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5f96c00c55
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[Fix] Add SM check to flashinfer MOE backend (#29144)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-11-23 00:39:30 +00:00 |
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Lukas Geiger
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d045e22dfe
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[Model][Qwen3VL] Tune Triton w8a8 block fp8 kernel for L40s (#29217)
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
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2025-11-21 17:30:55 -08:00 |
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Mingyuan Maandmgoin
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b4c8fbaae2
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Add TRTLLM MoE NVFP4 kernel to CompressedTensorsW4A4MoeMethod (#28892)
Signed-off-by: mingyuanm <mingyuanm@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-11-21 09:54:11 -07:00 |
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Hongxia Yang
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3f5f36da3f
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[ROCm] Fix for import when building with upstream triton for gfx1100 for gpt-oss serving (#29127)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
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2025-11-21 03:30:07 +00:00 |
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Shu WangandMichael Goin
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613abb50d5
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[MoE] Nvfp4 Masked Gemm: Add flashinfer grouped_gemm_nt_masked (#25990)
Signed-off-by: Shu Wang. <shuw@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-11-19 13:29:06 -08:00 |
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Varun Sundar RabindranathandVarun Sundar Rabindranath
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9912b8ccb8
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[Build] Add OpenAI triton_kernels (#28788)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
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2025-11-18 16:45:20 -08:00 |
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jiahancandMichael Goin
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561253b37f
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[Performance][Fix] update nvfp4 code to support renorm routing (#28569)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-11-16 18:02:42 -08:00 |
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TJian
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a425dc256e
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[Bugfix] [ROCm] [AITER]: Fix aiter block quant not compatible with torch compile dynamo (#28716)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2025-11-14 10:30:50 -08:00 |
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3f8a874065
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[Kernels] Enable FlashInfer FP8 Blockscale on SM90 (for TEP DSR1) (#27134)
Signed-off-by: Duncan Moss <djm.moss@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-11-14 08:02:44 -08:00 |
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wangxiyuan
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2dacd57394
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[platform] Move get_cu_count to utils (#27005)
Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
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2025-11-13 08:48:47 +08:00 |
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vllmellm
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d8140b9833
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[ROCM] Fix ROCm warnings, environment flag access, and GEMM kernel naming for consistency in _aiter_ops.py (#28464)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
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2025-11-12 21:46:57 +00:00 |
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Varun Sundar RabindranathandVarun Sundar Rabindranath
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74a9a9faad
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[Performance][B200] Fix deepgemm prologue (#27897)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
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2025-11-12 13:13:03 -08:00 |
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Alexander Matveev
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f76e85c299
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[Performance][Hopper] Avoid M dim padding to 4x for most cases (due to cuda graphs paddings) (#28492)
Signed-off-by: Alexander Matveev <amatveev@redhat.com>
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2025-11-12 10:51:43 -05:00 |
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Michael Goin
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f9a4087182
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Remove weight_scale.T special case for SM90 Block FP8 CUTLASS kernel (#28431)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-11 11:46:04 -05:00 |
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Yong Hoon Shin
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021143561f
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[ROCm] Add missing gemm_a8w8_blockscale import (#28378)
Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
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2025-11-10 23:13:36 +00:00 |
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jiahanc
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34553b9d27
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[Performance] Support FP8 flashinfer TRTLLM MOE on Qwen3 and Qwen-3next (#27492)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
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2025-11-10 12:34:57 -05:00 |
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vllmellmandLuka Govedič
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f080a83511
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[RFC][ROCm][AITER] Keep all AITER kernels in _aiter_ops class like _custom_ops and _ipex_ops (#24490)
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2025-11-10 08:20:53 -08:00 |
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smit kadvaniandSmit Shaileshbhai Kadvani
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11fd69dd54
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[amd][gptoss] Perf gain because of block alignment (#28024)
Signed-off-by: Smit Kadvani <smit.kadvani@gmail.com>
Co-authored-by: Smit Shaileshbhai Kadvani <kadvani@meta.com>
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2025-11-07 05:27:42 +00:00 |
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449de9001a
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[ROCm] triton fp8 kernel (#27058)
Signed-off-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: Gregory Shtrasberg <156009573+gshtras@users.noreply.github.com>
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2025-11-06 14:46:44 -05:00 |
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Shu Wang
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fc16f1c477
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Flashinfer_CUTLASS_MOE fuses quantization for TP (#27223)
Signed-off-by: Shu Wang. <shuw@nvidia.com>
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2025-10-31 17:54:29 +00:00 |
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5ff5d94e77
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[Bugfix] Fix gpt-oss w4a8 DP/EP on B200 (#26729)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-10-21 01:51:14 -04:00 |
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