 Hongxia Yangandtjtanaa
|
e28e8c8782
|
[ROCm][Quant] Minimax-M3: Enable fp8_per_channel for bf16 weights on mi300x (#45854)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com>
|
2026-06-17 12:02:40 +00:00 |
|
|
Joel Smith
|
68ff30d40e
|
[Bugfix] Fixes MiniCPM-O resampler device placement to avoid tensor device mismatch (#42332)
Signed-off-by: j9smith <j.smith9103@outlook.com>
|
2026-06-17 08:35:27 +00:00 |
|
|
arghyadeep sarkar
|
93bbe94d3a
|
[Kernel] Add weightless RMSNorm CUDA kernels for has_weight=False (#41430) (#44109)
Signed-off-by: hello-args <args.sarkar@gmail.com>
|
2026-06-16 23:45:55 -07:00 |
|
|
Ting SUNandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
a46abb7ae6
|
[Bugfix][Quantization] Reject unsupported compressed tensors KV cache schemes (#45312)
Signed-off-by: Ting Sun <suntcrick@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-17 05:08:41 +00:00 |
|
|
|
2785a5e0e6
|
[Bugfix][ROCm] Fix FP8 per-tensor scale rank mismatch causing Inductor assertion failure (#44912)
Signed-off-by: nehmathe2 <nehmathe2@gmail.com>
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Signed-off-by: nehmathe <nehmathe@amd.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
|
2026-06-16 20:17:42 -07:00 |
|
|
Dakai Anandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
71bc19dbdd
|
[Bugfix] Fix MoE model load OOM in FlashInfer_TRTLLM backend with sleep mode (#45589)
Signed-off-by: Dakai An <dakaian108@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-16 19:36:51 -07:00 |
|
|
sungsoo haandThomas Parnell
|
4bf699d310
|
[Kernel] Support DS Mamba tail copy for MTP align mode (#45473)
Signed-off-by: Sungsoo Ha <sungsooh@nvidia.com>
Co-authored-by: Thomas Parnell <tom.parnell@gmail.com>
|
2026-06-16 22:50:30 +00:00 |
|
|
Hongxia Yang
|
f2beaa80c8
|
[ROCm][Quant] mxfp8 moe/linear gfx950 tuning for MiniMax-M3 (#45725)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
|
2026-06-16 18:50:40 +00:00 |
|
|
Tiezhen WANGandClaude
|
89e8645a9e
|
[Model] Remove Dots1ForCausalLM (#45637)
Signed-off-by: Xianbao QIAN <xianbao.qian@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-06-17 00:32:18 +08:00 |
|
|
yifei wuandHarry Mellor
|
a52205bccf
|
[Model] Add HrmTextForCausalLM (Hierarchical Reasoning Model — Text) (#43098)
Signed-off-by: Wuyifei <wuyifei@me.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
|
2026-06-16 22:41:41 +08:00 |
|
|
Carl Y
|
eb04c769d3
|
feat: MLA prefill enable FA4 fp8 output (#43050)
Signed-off-by: Carl You <4531192+carlyou@users.noreply.github.com>
|
2026-06-16 07:10:59 -07:00 |
|
|
Netanel Haberandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
c5e5c33fcd
|
[Bugfix][MoE] Restore routed output unpadding before shared expert add (#45707)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-16 16:06:28 +03:00 |
|
|
Mike G
|
a8c86eeb16
|
[Quant] Support modelopt_mixed on Ampere (SM80/SM86) (#45306)
Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
|
2026-06-16 08:43:44 -04:00 |
|
|
Andreas Karatzas
|
7e179e4bc0
|
[ROCm][CI] Gate incompatible HF references on Transformers v5 (#41532)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-06-16 20:34:11 +08:00 |
|
|
|
405c7cf283
|
[ZenCPU] Add zencpu Platform Runtime Logging and Docs (#42726)
Signed-off-by: Lalithnarayan C <Lalithnarayan.C@amd.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
|
2026-06-16 08:23:12 -04:00 |
|
|
Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
3f53e2138f
|
[Refactor] Remove Fp8OnlineLinearMethod as scheduled (#45463)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-16 04:35:58 -07:00 |
|
|
|
ad32608e24
|
[MM][Perf][CG] Support dual-path ViT full CUDA graph for DeepSeek-OCR (#43586)
Signed-off-by: shen-shanshan <467638484@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
|
2026-06-16 04:35:20 -07:00 |
|
|
|
9d808e2309
|
[Core] Use fastsafetensors ParallelLoader for weight loading (#40183)
Signed-off-by: Git Bisector <gitbisector@gmail.com>
Signed-off-by: gitbisector <gitbisector@gmail.com>
Signed-off-by: git bisector <gitbisector@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
|
2026-06-15 22:32:05 -07:00 |
|
|
Itay Alroy
|
16e91176cf
|
[EP] Query NIXL EP top-k index dtype (#45298)
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
|
2026-06-15 22:50:18 +00:00 |
|
|
Itay Alroy
|
ab8b0fe338
|
nixl_ep: Skip post-receive quantization for NVFP4 (#45606)
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
|
2026-06-15 22:42:05 +00:00 |
|
|
|
0a1c5034f5
|
[Model] Add MiniMax M3 support (#45381)
Signed-off-by: youkaichao <youkaichao@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
|
2026-06-16 01:01:25 +08:00 |
|
|
RoyWang
|
a3195fab7b
|
[AMD][Bugfix][Quantization] Honor fused-name match in is_layer_skipped (#43981)
|
2026-06-15 09:37:52 -07:00 |
|
|
|
5ed15f42b9
|
Fix the E8M0 scale computation in the MXFP4 (W4A4) MOE CUTLASS kernel (#43557)
Signed-off-by: Xin He <xin3.he@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-06-15 06:04:54 -07:00 |
|
|
Martin Kukla
|
6c5872efc5
|
[Bugfix] Unset HF's default max_new_tokens for DiffusionGemma (#45417)
Signed-off-by: Martin Kukla <martin.kukla@cantab.net>
|
2026-06-15 17:31:57 +08:00 |
|
|
Giancarlo Delfinandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
b5adb027ad
|
[Models] Fix MiMo v2.x QKV TP sharding + FP4 support (#45200)
Signed-off-by: Giancarlo Delfin <gdelfin@inferact.ai>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-15 15:13:34 +08:00 |
|
|
Tiezhen WANGandClaude
|
7df4fe1bd7
|
[Model] Remove XverseForCausalLM (#45638)
Signed-off-by: Xianbao QIAN <xianbao.qian@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-06-14 22:09:00 -07:00 |
|
|
Noa Neria
|
1801fad0ba
|
[Bugfix] Stream Llama4 weight loading to avoid host-OOM with copy-returning loaders (#44645)
Signed-off-by: Noa Neria <nneria@nvidia.com>
|
2026-06-14 19:23:44 -07:00 |
|
|
Ting SUN
|
3d6ce816f0
|
[Bugfix][Model] Validate runai_streamer model_loader_extra_config (#45291)
Signed-off-by: Ting Sun <suntcrick@gmail.com>
|
2026-06-14 19:23:30 -07:00 |
|
|
Amanzhol Salykov
|
725c3bc808
|
[ROCm][Perf] Enable W4A16 FlyDSL MoE (#44400)
Signed-off-by: amd-asalykov <asalykov@amd.com>
Signed-off-by: Amanzhol Salykov <asalykov@amd.com>
|
2026-06-14 00:14:39 -07:00 |
|
|
Marceli FylcekandKunshang Ji
|
9548a1887f
|
[XPU] Support int4 group_size=32 W4A16 MoE (#45136)
Signed-off-by: Marceli Fylcek <marceli.fylcek@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-06-14 00:14:35 -07:00 |
|
|
|
78e7293bb1
|
[Build] Fix CUDA arch build coverage gaps (#45277)
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
Co-authored-by: Xin Li <xinli-sw@users.noreply.github.com>
Co-authored-by: ShawRong <ShawRong@users.noreply.github.com>
Co-authored-by: Change72 <Change72@users.noreply.github.com>
|
2026-06-13 22:09:20 -07:00 |
|
|
Wentao Yeandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
71b961dd35
|
[Perf] SM90 cutlass fp8 mm supports odd M by swap_ab, 180~290% kernel performance improvement (#44572)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-13 12:05:45 -07:00 |
|
|
Harry Mellor
|
b3f0a0a0df
|
Fix docs build on main (#45536)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
|
2026-06-13 08:53:23 -07:00 |
|
|
Wentao Ye
|
96fa5cdd9e
|
[CI Bug] Fix ValueError: There is no module or parameter named 'model.vision_tower.vision_model' (#45478)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2026-06-13 02:38:37 -07:00 |
|
|
|
ff5a30cfac
|
[Bugfix] Replace deprecated Qwen2VLImageProcessorFast with Qwen2VLImageProcessor (#42700)
Signed-off-by: abinggo <107740309+abinggo@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
|
2026-06-12 21:04:31 -07:00 |
|
|
Michael GoinandClaude
|
c90650088d
|
Add the QuantizedActivation linear-kernel contract (#44260)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-06-12 13:48:15 -07:00 |
|
|
Michael Goin
|
9eaacb23ec
|
[Kernel] Consolidate Marlin thread-tile padding across all dense Marlin paths (#45295)
Signed-off-by: mgoin <mgoin64@gmail.com>
|
2026-06-12 13:46:21 -07:00 |
|
|
Isotr0py
|
6635279d8a
|
[Migration] Migrate GGUF quantization support to plugin (#39612)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
|
2026-06-12 12:02:21 -07:00 |
|
|
Jonas I. Liechti
|
d6fd7ce8da
|
[Model][Dflash] Enable Dflash support for Qwen3NextForCausalLM targets (#45319)
Signed-off-by: Jonas I. Liechti <j-i-l@t4d.ch>
|
2026-06-12 10:30:09 -07:00 |
|
|
Yi Zhong
|
053e7daa79
|
[Model] Add encoder CUDA graph support to Lfm2VL (#44930)
Signed-off-by: vincentzed <207368749+vincentzed@users.noreply.github.com>
|
2026-06-12 09:17:26 -07:00 |
|
|
|
f1e13f7df9
|
[Model] Remove Mono-InternVL (InternLM2VEForCausalLM) (#45129)
Signed-off-by: Xianbao QIAN <xianbao.qian@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
|
2026-06-12 10:41:09 +00:00 |
|
|
Yuwen Zhou
|
0cd9b7af25
|
[CPU] Support CPU W4A16 INT4 MoE (#43409)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
|
2026-06-12 07:12:37 +00:00 |
|
|
Rohan Potdar
|
fe04238292
|
[ROCm][gpt-oss] Pass GateMode.INTERLEAVE for MXFP4 W4A16 fused MoE (#44893)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Rohan Potdar <66227218+Rohan138@users.noreply.github.com>
|
2026-06-12 01:02:04 -05:00 |
|
|
allgatherandIsotr0py
|
39dee1114a
|
[MM][Perf][CG] Support ViT full cudagraphs for mllama4 (#40660)
Signed-off-by: allgather <all2allops@gmail.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
|
2026-06-11 22:17:55 -07:00 |
|
|
|
eb28452b10
|
[Model] Add DiffusionGemma Support (#45163)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Martin Kukla <martin.kukla@cantab.net>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Dipika Sikka <dsikka@redhat.com>
Co-authored-by: NickLucche <nlucches@redhat.com>
Co-authored-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: Alec Kohlhoff <134344302+aleckohlhoff@users.noreply.github.com>
Co-authored-by: Porras Huang <20535584+porrashuang@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: scoootscooob <167050519+scoootscooob@users.noreply.github.com>
|
2026-06-11 22:17:35 -07:00 |
|
|
Ting SUN
|
c1076839c9
|
[Bugfix][Model] Pass revision by name in Run:ai and bitsandbytes index downloads (#45308)
Signed-off-by: Ting Sun <suntcrick@gmail.com>
|
2026-06-11 20:21:46 -07:00 |
|
|
jpwangandmergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
6f573f486b
|
[Bugfix] Initialize missing attributes in mistral eagle (#45217)
Signed-off-by: jpwang <jpwang@smail.nju.edu.cn>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-12 08:21:01 +08:00 |
|
|
Tiezhen WANGandClaude
|
c9340e6f35
|
[Model] Remove InternLMForCausalLM registry alias (#45128)
Signed-off-by: Xianbao QIAN <xianbao.qian@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-06-11 20:02:51 +00:00 |
|
|
wentian-byte
|
b8142294b7
|
[Bugfix] Restrict FlashInfer cuDNN FP8 ViT attention gate to Blackwell (SM 100) (#45251)
Signed-off-by: Wentian Byte <3400259131@qq.com>
|
2026-06-11 16:39:24 +00:00 |
|
|
Jiangyun Zhu
|
f81daf8880
|
[Attention] add triton diff-kv backend for mimo (#41797)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
|
2026-06-11 11:36:31 -04:00 |
|