 Andreas Karatzas
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8b660ce96b
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[ROCm][Test] Cover MoRI graph replay and output lifetime (#58093)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-23 14:16:51 -07:00 |
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Ankit-Jaiswal-AMDandDouglas Lehr
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88afb9dcac
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[CPU] Adds support for fp32 attention sinks (#56252)
Signed-off-by: Ankit Jaiswal <ankit.jaiswal@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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2026-09-23 08:55:09 -05:00 |
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Shuolei Wang
|
9ed81581a8
|
[Perf][MoE] Skip top-k slots routed to non-local experts in TritonExp… (#58051)
Signed-off-by: Shuolei Wang <shuoleiwang123@gmail.com>
Signed-off-by: Shuolei Wang <948904026@qq.com>
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2026-09-23 21:03:21 +08:00 |
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157bcb7c48
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[DSpark] Support pipeline-parallel targets in aggregated serving (#56956)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-09-23 04:52:28 -07:00 |
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Andreas Karatzas
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a22c637ed9
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[ROCm][Test] Check GDN prefill numerics and output ownership (#58091)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-09-23 02:19:58 -07:00 |
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Gabriel WuandKimi Code
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c843f0cab7
|
[Bugfix][SM120][MLA] Support NoPE sparse MLA (GLM-5.3-Flash) on the FlashInfer SM120 backend (#55277)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Kimi Code <noreply@moonshot.cn>
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2026-09-23 02:03:20 -07:00 |
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1904ed9402
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[Perf][ROCm][Attention] Narrow the Triton prefill-attention KV tile on RDNA3/RDNA4 (#58225)
Signed-off-by: Jipeng Li <jipengli@amd.com>
Co-authored-by: GitHub Copilot CLI <noreply@github.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-23 08:39:27 +00:00 |
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vllm-agentandkimi-no-na-wa
|
955bd6abef
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[CI][Bugfix] Extend groupwise rms_norm scale tolerance to CUDA (#58252)
Signed-off-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
|
2026-09-23 01:29:11 -07:00 |
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Andreas KaratzasandOpenAI Codex
|
153242a314
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[ROCm][CI] Add MI355 dense NVFP4 and MoRI kernel mirrors (#58281)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
|
2026-09-23 03:06:15 -05:00 |
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Michał GanczarenkoandClaude
|
73c59d365b
|
[XPU] Wire up SYCL apply_rotary_emb kernel in ApplyRotaryEmb (#55721)
Signed-off-by: Michal Ganczarenko <michal.ganczarenko@intel.com>
Signed-off-by: Michał Ganczarenko <michal.ganczarenko@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-09-22 20:43:24 -07:00 |
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8d16ca6cc2
|
[CI][Bugfix] Update IPC test caller for #57312's _apply_entries signature (#58107)
Signed-off-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: Kevin H. Luu <khluu000@gmail.com>
|
2026-09-22 18:50:06 -07:00 |
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d110c2f19c
|
[ROCm] Use silu_and_mul_with_clamp's torch._C op (#52052)
Signed-off-by: Tres Popp <tres.popp@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-22 18:30:14 -05:00 |
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1c0eee919d
|
[ROCm][Model][Bugfix] Enable GLM-5.2-MXFP4 on the deepseek_v32 path and fix sparse attention correctness (#51915)
Signed-off-by: Jack Hu <Jack.Hu@amd.com>
Signed-off-by: Jack Hu <jack.hu@amd.com>
Signed-off-by: Douglas Lehr <Doug.Lehr@amd.com>
Co-authored-by: James E T Smith <jamesETsmith@users.noreply.github.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
Co-authored-by: Douglas Lehr <Doug.Lehr@amd.com>
|
2026-09-22 18:08:51 -05:00 |
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stefankoncarevicandAndreas Karatzas
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9646f53064
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[Bugfix][ROCm] Use the platform FP8 range in the concat MLA q test (#58153)
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-22 18:05:33 -05:00 |
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Misha Goin
|
25965ee583
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[Kernel] Remove AllSpark INT8 W8A16 GEMM backend (#58001)
Signed-off-by: mgoin <mgoin64@gmail.com>
|
2026-09-22 14:07:34 -07:00 |
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Divakar VermaandAndreas Karatzas
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d1f63f2af9
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[ROCm][CI] Add GELU activation for AiterExperts in the modular-kernel coverage (#58030)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-22 14:39:13 -05:00 |
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ca831d1c55
|
[ROCm][DSv4.1][Perf] Fuse the inverse RoPE into the sparse decode reduce (#57435)
Signed-off-by: Fangzhou Ai <fangzhou.ai@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-09-22 18:05:11 +00:00 |
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066ee91197
|
[Bugfix][Attention] Avoid NaN in the Triton softcap for large attention logits (#56579)
Signed-off-by: Kushal Dabbe <72650064+kushaldabbe@users.noreply.github.com>
Co-authored-by: opencode <noreply@opencode.ai>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
|
2026-09-22 12:11:05 -04:00 |
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f92b78f6ef
|
[Kernel][DSV4.1] Fuse MXFP8 wo_b GEMM with sequence-parallel reduce-scatter (#57428)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Signed-off-by: Canlin <canlinguosdu@gmail.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-09-22 01:07:17 -07:00 |
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yinfengLiuandShanshan Shen
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2af05512cf
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[Kernel] Add opt-in load-time MXFP4 dequantization (#50814)
Signed-off-by: Liuyinfeng01 <yinfeliu@amd.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-22 14:51:12 +08:00 |
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Mikko TukiainenandCursor
|
68363d64ec
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[ROCm][Perf] Avoid extra reshape kernel in Qwen GDN output norm (#47842)
Signed-off-by: Mikko Tukiainen <Mikko.Tukiainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-09-22 14:38:16 +08:00 |
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a369a7becc
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[Perf][Attention] Reduce GLM sparse MLA preparation overhead (#57458)
Signed-off-by: Summer Yang <girasoleyang@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Jiangyun Zhu <riverclouds.zhu@qq.com>
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2026-09-21 17:24:25 -07:00 |
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Garrett GoonandClaude Opus 5
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8bf051cd51
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[Bugfix][Kernel] Skip the fused silu-mul block-quant fast path when a swiglu clamp is set (#57984)
Signed-off-by: Garrett Goon <garrett@primeintellect.ai>
Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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2026-09-21 22:38:38 +00:00 |
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Andreas KaratzasandOpenAI Codex
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12972ae40b
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[Bugfix][ROCm] Reject unsupported EP for monolithic AITER MXFP4 MoE (#57866)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 15:30:21 -05:00 |
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Andreas KaratzasandOpenAI Codex
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9179bcd416
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[Bugfix][MoE] Reject hash routing for unsupported monolithic backends (#57867)
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 16:28:35 -04:00 |
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874a6b5a06
|
[ROCm] Refactor tuned gemms (#55001)
Signed-off-by: Andy Friedrich <afriedri@amd.com>
Signed-off-by: afriedri <afriedri@amd.com>
Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-21 16:30:16 +00:00 |
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Tuukka Sarviandlarryli2-amd
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e34685dfc0
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[ROCm][DSv4] Enable DSpark adaptive verification (#52362)
Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Signed-off-by: larryli2-amd <larryli2@amd.com>
Co-authored-by: larryli2-amd <larryli2@amd.com>
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2026-09-21 10:03:41 -05:00 |
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Andreas KaratzasandOpenAI Codex
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82daf9f575
|
[CI][ROCm] Add ten AMD parity groups (#57876)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 11:08:06 +00:00 |
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Andreas KaratzasandOpenAI Codex
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8902dbb177
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[CI][ROCm] Mirror remaining portable suites without duplicate coverage (#57877)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 04:16:26 -05:00 |
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b8cf275382
|
[AMD][Minimax-M3][perf] Enable packed LBHNC AITER QK-norm fusion for MiniMax-M3 on ROCm (#54535)
Signed-off-by: Wei-Ting Liao <wei-ting.liao@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Shanshan Shen <467638484@qq.com>
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2026-09-21 16:38:30 +08:00 |
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Woosuk KwonandOpenAI Codex
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67513c8b67
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[Bugfix][DSV4.1] Restrict mHC overlap to full CUDA graphs (#57874)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: OpenAI Codex <noreply@openai.com>
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2026-09-21 01:16:59 -07:00 |
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Woosuk KwonandCodex
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9a70c233cd
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[Perf][DSV4.1] Fuse TP all-reduce with mHC input preparation (#57643)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-20 20:28:06 -07:00 |
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JohnQinAMD
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6dfd87f596
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[ROCm][DSv4.1] Keep the Engram tables in host memory on ROCm (#57491)
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2026-09-21 10:17:11 +08:00 |
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Woosuk KwonandCodex
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9b49f92344
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[Perf][DSV4.1] Overlap mHC coefficients for small TP batches (#57603)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-20 17:33:17 -07:00 |
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01f1f58f10
|
[ROCm][CI] Query HIP device memory for test GPU teardown waits. (#57450)
Signed-off-by: Sheral Kumar <shekumar@amd.com>
Signed-off-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: Andreas Karatzas <Andreas.Karatzas@amd.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-09-20 15:20:39 -05:00 |
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7d99c2c4fd
|
[Feature][Humming] Humming feature integration (#56685)
Signed-off-by: jinzhen.ljz <jinzhen.ljz@antgroup.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2026-09-20 08:11:01 -07:00 |
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Chauncey
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bf01fc4a31
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[GLM-5.3-Flash] Route kpool indexer top-k through the shared SparseIndexerTopk dispatcher (#57546)
Signed-off-by: chaunceyjiang <chaunceyjiang@gmail.com>
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2026-09-20 11:17:59 +00:00 |
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db1bfdd4fb
|
[Bugfix][GLM-5.3-Flash] Address kpool tail blocks by the padded indexer stride in the NVIDIA prefill seed kernel (#57477)
Signed-off-by: Jared Wen <w13431838023@gmail.com>
Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-20 18:15:04 +08:00 |
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Misha GoinandErinYin
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e5fce7b56b
|
[Core][Kernel] Share persistent workspaces for Marlin and Humming (#57421)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: ErinYin <liang.yin@daocloud.io>
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2026-09-20 17:28:33 +08:00 |
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a7fda4c88b
|
[Bugfix] Fix SM100 fp8_ds_mla cache scales (#49435)
Signed-off-by: Ariel Bereslavsky <arielb@getimpala.ai>
Signed-off-by: Ariel Bereslavsky <ariel@getimpala.ai>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Ariel Bereslavsky <arielb@getimpala.ai>
Co-authored-by: Codex <noreply@openai.com>
Co-authored-by: Misha Goin <mgoin64@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-09-19 17:15:07 -07:00 |
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674b6d95d6
|
[CI][Bugfix] Fix MoE reprocess test mock after #57405's kernel refactor (#57641)
Signed-off-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: kimi-no-na-wa <kimi-no-na-wa@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-09-19 21:42:21 +00:00 |
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fbe8a157fb
|
[ROCm][Perf] Enable the AITER GDN decode fast path for flat qkvz layouts (#53623)
Signed-off-by: Mikko Tukiainen <Mikko.Tukiainen@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-09-19 06:05:04 -07:00 |
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Woosuk KwonandCodex
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50d812b66a
|
[Perf][DSV4.1] Optimize MegaMoE staging and NVFP4 cache gathers (#57604)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-18 12:57:19 -07:00 |
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frida-andersson
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71fc70d3ae
|
[ROCm][DSv4] Fix sparse-indexer logits collapse on gfx950/gfx942 (#50455)
Signed-off-by: Frida Andersson <fanderss@amd.com>
Signed-off-by: frida-andersson <fanderss@amd.com>
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2026-09-18 16:57:44 +00:00 |
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Kevin Liandkevinli
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911548247a
|
[Distributed][MoonEP] BF16 integration of MoonEP balanced EP backend (#52101)
Signed-off-by: kevinli <306243285+kaijunli-infr@users.noreply.github.com>
Co-authored-by: kevinli <306243285+kaijunli-infr@users.noreply.github.com>
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2026-09-18 10:34:01 -04:00 |
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Yuwen ZhouandLi, Jiang <jiang1.li@intel.com>
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b346479065
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[CPU] Add CPU FP8 W8A8 linear/MoE support (#49942)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-09-18 17:59:42 +08:00 |
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olka-amdandClaude Opus 5
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32636580a6
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[Bugfix][MLA] TritonMLA: fix illegal memory access on causal multi-token decode (#51065)
Signed-off-by: Oleksandr Kachur <oleksandr.kachur@amd.com>
Co-authored-by: Claude Opus 5 <noreply@anthropic.com>
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2026-09-18 03:49:53 -05:00 |
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Thien TranandCodex
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8da75d6190
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C3x SM100 FP8 blockwise - Pad activation scales to multiple of 4 (#57377)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Codex <noreply@openai.com>
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2026-09-18 08:39:27 +00:00 |
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Rohan PotdarandClaude
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213c379fca
|
[ROCm][Bugfix] Gate AITER MXFP8 MoE on the aiter enable flag (#57426)
Signed-off-by: Rohan Potdar <rohan.potdar@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-09-18 00:06:05 +00:00 |
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Misha Goin
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ac78445bc9
|
[MoE] Encapsulate TRT-LLM BF16 weight layout handling (#57405)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-09-17 17:47:30 -04:00 |
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