 Zhuohan Li
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e90fc21f2e
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[Hardware][Neuron] Refactor neuron support (#3471)
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2024-03-22 01:22:17 +00:00 |
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Nick Hill
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4ad521d8b5
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[Core] Add generic typing to LRUCache (#3511)
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2024-03-20 00:36:09 -07:00 |
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Simon Mo
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20478c4d3a
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Use lru_cache for some environment detection utils (#3508)
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2024-03-19 21:34:15 +00:00 |
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Simon Mo
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cc63d03fbb
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Revert "[Core] Cache some utils" (#3507)
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2024-03-19 13:22:58 -07:00 |
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Antoni Baum
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b37cdce2b1
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[Core] Cache some utils (#3474)
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2024-03-18 17:14:26 -07:00 |
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youkaichaoandSimon Mo
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b522c4476f
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[Misc] add HOST_IP env var (#3419)
Co-authored-by: Simon Mo <simon.mo@hey.com>
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2024-03-14 21:32:52 -07:00 |
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Zhuohan Li
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2f8844ba08
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Re-enable the 80 char line width limit (#3305)
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2024-03-10 19:49:14 -07:00 |
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Michael Goin
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385da2dae2
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Measure model memory usage (#3120)
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2024-03-07 11:42:42 -08:00 |
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ttbachyinsdaandguofangze
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76e8a70476
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[Minor fix] The domain dns.google may cause a socket.gaierror exception (#3176)
Co-authored-by: guofangze <guofangze@kuaishou.com>
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2024-03-04 19:17:12 +00:00 |
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Liangfu Chen
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3b7178cfa4
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[Neuron] Support inference with transformers-neuronx (#2569)
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2024-02-28 09:34:34 -08:00 |
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Jingru
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2410e320b3
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fix get_ip error in pure ipv6 environment (#2931)
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2024-02-26 19:22:16 -08:00 |
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zhaoyang-star
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57f044945f
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Fix nvcc not found in vlm-openai image (#2781)
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2024-02-22 14:25:07 -08:00 |
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Massimiliano Pronesti
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93dc5a2870
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chore(vllm): codespell for spell checking (#2820)
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2024-02-21 18:56:01 -08:00 |
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Lily Liu
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fe6d09ae61
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[Minor] More fix of test_cache.py CI test failure (#2750)
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2024-02-06 11:38:38 -08:00 |
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Kunshang JiandJiang Li
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96b6f475dd
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Remove hardcoded device="cuda" to support more devices (#2503)
Co-authored-by: Jiang Li <jiang1.li@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2024-02-01 15:46:39 -08:00 |
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9090bf02e7
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Support FP8-E5M2 KV Cache (#2279)
Co-authored-by: zhaoyang <zhao.yang16@zte.com.cn>
Co-authored-by: Zhuohan Li <zhuohan123@gmail.com>
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2024-01-28 16:43:54 -08:00 |
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Hongxia Yang
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6b7de1a030
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[ROCm] add support to ROCm 6.0 and MI300 (#2274)
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2024-01-26 12:41:10 -08:00 |
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9b945daaf1
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[Experimental] Add multi-LoRA support (#1804)
Co-authored-by: Chen Shen <scv119@gmail.com>
Co-authored-by: Shreyas Krishnaswamy <shrekris@anyscale.com>
Co-authored-by: Avnish Narayan <avnish@anyscale.com>
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2024-01-23 15:26:37 -08:00 |
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Cade Daniel
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18bfcdd05c
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[Speculative decoding 2/9] Multi-step worker for draft model (#2424)
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2024-01-21 16:31:47 -08:00 |
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Liangfu Chen
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18473cf498
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[Neuron] Add an option to build with neuron (#2065)
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2024-01-18 10:58:50 -08:00 |
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Yunfeng Bai
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4b61c6b669
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get_ip(): Fix ipv4 ipv6 dualstack (#2408)
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2024-01-10 11:39:58 -08:00 |
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Zhuohan Li
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fd4ea8ef5c
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Use NCCL instead of ray for control-plane communication to remove serialization overhead (#2221)
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2024-01-03 11:30:22 -08:00 |
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37ca558103
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Optimize model execution with CUDA graph (#1926)
Co-authored-by: Chen Shen <scv119@gmail.com>
Co-authored-by: Antoni Baum <antoni.baum@protonmail.com>
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2023-12-16 21:12:08 -08:00 |
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Woosuk Kwon
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30bad5c492
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Fix peak memory profiling (#2031)
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2023-12-12 22:01:53 -08:00 |
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6ccc0bfffb
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Merge EmbeddedLLM/vllm-rocm into vLLM main (#1836)
Co-authored-by: Philipp Moritz <pcmoritz@gmail.com>
Co-authored-by: Amir Balwel <amoooori04@gmail.com>
Co-authored-by: root <kuanfu.liu@akirakan.com>
Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: kuanfu <kuanfu.liu@embeddedllm.com>
Co-authored-by: miloice <17350011+kliuae@users.noreply.github.com>
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2023-12-07 23:16:52 -08:00 |
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Yanming W
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e0c6f556e8
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[Build] Avoid building too many extensions (#1624)
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2023-11-23 16:31:19 -08:00 |
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Simon Mo
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5ffc0d13a2
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Migrate linter from pylint to ruff (#1665)
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2023-11-20 11:58:01 -08:00 |
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Antoni Baum
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cf5cb1e33e
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Allocate more shared memory to attention kernel (#1154)
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2023-09-26 22:27:13 -07:00 |
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Zhuohan Li
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d6fa1be3a8
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[Quality] Add code formatter and linter (#326)
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2023-07-03 11:31:55 -07:00 |
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Zhuohan Li
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85de093472
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[Fix] Do not pin memory when in WSL (#312)
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2023-06-29 15:00:21 -07:00 |
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Woosuk Kwon
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0b98ba15c7
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Change the name to vLLM (#150)
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2023-06-17 03:07:40 -07:00 |
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