 usberkeley
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4ab34f6ef1
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Add NUMA node validation for CPU thread binding (#28555)
Signed-off-by: Bradley <bradley.b.pitt@gmail.com>
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2025-11-13 07:03:52 +00:00 |
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Louie Tsai
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5c8d34a42c
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Support no privileged mode on CPU for docker and kubernetes deployments (#19241)
Signed-off-by: Tsai, Louie <louie.tsai@intel.com>
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2025-06-11 04:11:47 -07:00 |
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rongfu.leng
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4e9cf8c1dd
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[Bugfix] fix gettid method is not define (#16084)
Signed-off-by: rongfu.leng <rongfu.leng@daocloud.io>
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2025-04-08 19:12:44 -07:00 |
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Li, Jiang
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550b2801ad
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[CPU][Bugfix] Using custom allreduce for CPU backend (#15934)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-04-02 07:46:47 -07:00 |
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Wallas HenriqueandMichael Goin
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cfd3219f58
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[Hardware][Apple] Native support for macOS Apple Silicon (#11696)
Signed-off-by: Wallas Santos <wallashss@ibm.com>
Co-authored-by: Michael Goin <michael@neuralmagic.com>
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2025-01-08 16:35:49 +08:00 |
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Li, Jiang
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0b952af458
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[Hardware][Intel] Support compressed-tensor W8A8 for CPU backend (#7257)
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2024-09-11 09:46:46 -07:00 |
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Li, Jiang
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3bbb4936dc
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[Hardware] [Intel] Enable Multiprocessing and tensor parallel in CPU backend and update documentation (#6125)
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2024-07-26 13:50:10 -07:00 |
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