 Vasiliy Kuznetsov
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0d402d2600
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online fp8 quant with streaming weight post-processing (#29196)
Signed-off-by: vasiliy <vasiliy@fb.com>
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2025-12-08 20:15:10 +00:00 |
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Zhiwei
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c6df05ebb4
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[ROCm] [Fused Moe EP] Use binary expert mask for aiter fused moe kernel (#29773)
Signed-off-by: ZhiweiYan-96 <zhiwei.yan@amd.com>
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2025-12-08 05:23:46 +00:00 |
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ElizaWszolaandyewentao256
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af0444bf40
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[Performance] Fused blockwise quant RMS norm (#27883)
Signed-off-by: ElizaWszola <ewszola@redhat.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
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2025-12-07 16:38:04 +00:00 |
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Wentao Ye
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541a2ef892
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[Perf] Deepgemm fused layout kernel for activations, 4.3% throughput improvement, 10.7% TTFT improvement. (#29546)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-07 20:31:14 +08:00 |
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yuttian1
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c4d62618ca
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Fix AWQ MoE marlin check issue in marlin_utils.py for AMD backend (#30102)
Signed-off-by: yuttian1 <yuttian@amd.com>
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2025-12-05 20:54:38 -08:00 |
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rasmithandRandall Smith
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dc839ad03d
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[CI/Build][AMD][Quantization] Fix test_int8_kernel.py by updating int8_utils to use hip.libdevice.round (#30151)
Signed-off-by: Randall Smith <ransmith@amd.com>
Co-authored-by: Randall Smith <ransmith@amd.com>
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2025-12-05 20:52:11 -08:00 |
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Wentao Ye
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7b5575fa7d
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[Bug] Fix vLLM config is not set error (#29999)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2025-12-05 16:42:12 -05:00 |
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Yi Liu
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0d8a7d8a26
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[Compressed Tensors] Add XPU wNa16 support (#29484)
Signed-off-by: yiliu30 <yi4.liu@intel.com>
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2025-12-05 22:02:09 +08:00 |
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Jee Jee Li
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652ba93da3
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[Bugfix] Fix FP8 MoE LoRA (#29890)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-12-04 18:17:49 +00:00 |
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bnellnmandTyler Michael Smith
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2902c34826
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[Kernels] Remove BatchedTritonOrDeepGemmExperts and default fallback to Triton (#29929)
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: bnellnm <49004751+bnellnm@users.noreply.github.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-12-03 20:49:00 +00:00 |
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19bee6d12d
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[Performance][DP/EP] Add silu_mul_per_token_group_quant_fp8_colmajor kernel (#29470)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2025-12-03 18:04:59 +00:00 |
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HDCharlesandIsotr0py
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b294e28db2
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[refactor] CTMoEMethods to use QuantizationArgs (#28871)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-12-03 11:00:56 +00:00 |
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Fanli Lin
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f37e8938d2
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[XPU] Fix AWQ skipped layer detection in IPEX quantization (#29774)
Signed-off-by: Fanli Lin <fanli.lin@intel.com>
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2025-12-01 12:00:52 +00:00 |
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Omer Ullman Argov
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39d28108f4
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[Feat] Support non-gated activations in NVFP4 modelopt path (#29004)
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2025-11-30 11:02:40 -05:00 |
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Isotr0py
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47539cfd3e
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[Bugfix] Fix mismatched nvfp4 gemm output shape (#29742)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-11-30 09:15:01 +00:00 |
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Isotr0py
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e1464c3a08
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[Quantization] Enable compressed-tensors AWQ for Turing GPU (#29732)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-11-30 06:04:28 +00:00 |
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Xin YangandJee Jee Li
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a491b0911b
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[LoRA] Support FusedMoE LoRA Triton kernel for mxfp4 (#29708)
Signed-off-by: Xin Yang <xyangx@amazon.com>
Signed-off-by: Xin Yang <105740670+xyang16@users.noreply.github.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-11-30 10:37:25 +08:00 |
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1656ad3704
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[Kernel][Quantization] add w4a8 support for marlin kernel (#24722)
Signed-off-by: Jinzhen Lin <jinzhen.ljz@antgroup.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin@redhat.com>
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2025-11-29 07:19:33 -08:00 |
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Didier Durand
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04a797cd0e
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[Doc]: fixing typos in various files. (#29717)
Signed-off-by: Didier Durand <durand.didier@gmail.com>
|
2025-11-29 01:15:39 -08:00 |
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Huamin Li
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3fd1fb0b60
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Revert "[LoRA] Support FusedMoE LoRA Triton kernel for mxfp4 (#28971)" (#29697)
Signed-off-by: Huamin Li <3ericli@gmail.com>
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2025-11-28 15:26:52 -08:00 |
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Xin YangandJee Jee Li
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745a3bae1a
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[LoRA] Support FusedMoE LoRA Triton kernel for mxfp4 (#28971)
Signed-off-by: Xin Yang <xyangx@amazon.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-11-28 10:48:28 +08:00 |
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Matthew Bonanni
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fc1d8be3dc
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[Attention] Update attention imports (#29540)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2025-11-27 11:19:09 -05:00 |
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HDCharles
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df01eda4dc
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[Bugfix] Make compressed-tensors MoEs respect ignored layers (#28878)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
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2025-11-26 21:35:13 -05:00 |
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HDCharlesandIsotr0py
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e603129505
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[refactor] CTConfig methods to static/class methods (#28870)
Signed-off-by: HDCharles <charlesdavidhernandez@gmail.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-11-26 17:21:58 +00:00 |
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Michael GoinandWentao Ye
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7df0289782
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Change warning logs to debug for unimplemented MXFP4 Linear/Attention (#29441)
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-11-25 22:52:31 +00:00 |
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Michael Goin
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e502098643
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[Kernel] Add NVFP4 MoE CUTLASS support for SM120 (#29242)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
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2025-11-25 06:59:07 -08:00 |
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Michael Goin
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6f1355a1b7
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[Perf] Disable DeepGEMM MoE by default when TP=8 is used (#29346)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-24 19:01:40 -07:00 |
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Michael Goin
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c17610e2ba
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[Bugfix] Only use triton_kernels for MXFP4 on SM90 and SM100 (#29339)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-24 18:22:46 -05:00 |
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bnellnm
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8f066146c3
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[MoE][Refactor] Make select_experts a non-static method (#29067)
Signed-off-by: Bill Nell <bnell@redhat.com>
|
2025-11-24 13:38:04 -05:00 |
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jiahancandmgoin
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5f96c00c55
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[Fix] Add SM check to flashinfer MOE backend (#29144)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
|
2025-11-23 00:39:30 +00:00 |
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Lukas Geiger
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d045e22dfe
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[Model][Qwen3VL] Tune Triton w8a8 block fp8 kernel for L40s (#29217)
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
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2025-11-21 17:30:55 -08:00 |
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Mingyuan Maandmgoin
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b4c8fbaae2
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Add TRTLLM MoE NVFP4 kernel to CompressedTensorsW4A4MoeMethod (#28892)
Signed-off-by: mingyuanm <mingyuanm@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-11-21 09:54:11 -07:00 |
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Wentao YeandNick Hill
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a42ab317ac
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[Log] Optimize startup log (#28948)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
Co-authored-by: Nick Hill <nhill@redhat.com>
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2025-11-21 08:46:20 -08:00 |
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Aleksandr MalyshevandAleksandr Malyshev
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b7f1f490a6
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Upstream triton fp4 weight preshuffle (#28888)
Signed-off-by: Aleksandr Malyshev <maleksan@amd.com>
Co-authored-by: Aleksandr Malyshev <maleksan@amd.com>
|
2025-11-21 11:34:46 -05:00 |
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Hongxia Yang
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3f5f36da3f
|
[ROCm] Fix for import when building with upstream triton for gfx1100 for gpt-oss serving (#29127)
Signed-off-by: Hongxia Yang <hongxia.yang@amd.com>
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2025-11-21 03:30:07 +00:00 |
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Shengliang Xu
|
a8c536829c
|
Consolidate Nvidia ModelOpt quant config handling for all quantization methods (#28076)
Signed-off-by: Shengliang Xu <shengliangx@nvidia.com>
|
2025-11-19 22:39:36 -05:00 |
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Wentao Ye
|
5031cd5d55
|
[Refactor] Optimize select_experts (#28069)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
|
2025-11-19 18:53:15 -05:00 |
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JartX
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8e38e99829
|
[Feature] EPLB on Qwen3VLMoe and CompressedTensorsWNA16MoEMethod (#28849)
|
2025-11-19 18:30:08 -05:00 |
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Shu WangandMichael Goin
|
613abb50d5
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[MoE] Nvfp4 Masked Gemm: Add flashinfer grouped_gemm_nt_masked (#25990)
Signed-off-by: Shu Wang. <shuw@nvidia.com>
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2025-11-19 13:29:06 -08:00 |
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Chen BruceandHarry Mellor
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da2f6800e0
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[Feat][Perf] Enable deepep-low-latency with round-robin expert placement. (#28449)
Signed-off-by: bruceszchen <bruceszchen@tencent.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-11-19 13:46:24 +01:00 |
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Xin Yang
|
468a8d72ba
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[Bugfix] Fix FusedMoEModularKernel for triton backend (#28913)
Signed-off-by: Xin Yang <xyangx@amazon.com>
|
2025-11-19 13:05:22 +08:00 |
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Li, Jiang
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20852c8f4c
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[CPU] Refactor CPU WNA16 (#28826)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
|
2025-11-19 10:32:00 +08:00 |
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Varun Sundar RabindranathandVarun Sundar Rabindranath
|
9912b8ccb8
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[Build] Add OpenAI triton_kernels (#28788)
Signed-off-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
Co-authored-by: Varun Sundar Rabindranath <vsundarr@redhat.com>
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2025-11-18 16:45:20 -08:00 |
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c2612371ad
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[Model] Add Gemma3 GGUF multimodal support (#27772)
Signed-off-by: Luciano Martins <lucianommartins@users.noreply.github.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Luciano Martins <lucianommartins@users.noreply.github.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
|
2025-11-18 08:56:29 -08:00 |
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xuebwang-amdandgemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
|
d0a73620cc
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[ROCm][Quantization] add apply_vllm_mapper in quark config for models like gpt-oss (#28638)
Signed-off-by: xuebwang-amd <xuebwang@amd.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
|
2025-11-18 11:16:45 +08:00 |
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Zhewen Li
|
f8b19c0ffd
|
[Bugfix] Fix GPT-OSS on AMD after #28603 (#28816)
Signed-off-by: zhewenli <zhewenli@meta.com>
|
2025-11-17 13:15:26 -05:00 |
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jiahancandMichael Goin
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561253b37f
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[Performance][Fix] update nvfp4 code to support renorm routing (#28569)
Signed-off-by: jiahanc <173873397+jiahanc@users.noreply.github.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
|
2025-11-16 18:02:42 -08:00 |
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amirkl94
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03ee48111d
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Feature: Support Relu2 in FusedMoE fp8 cutlass path (#27261)
|
2025-11-16 13:39:44 -05:00 |
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TJian
|
a425dc256e
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[Bugfix] [ROCm] [AITER]: Fix aiter block quant not compatible with torch compile dynamo (#28716)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
|
2025-11-14 10:30:50 -08:00 |
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3f8a874065
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[Kernels] Enable FlashInfer FP8 Blockscale on SM90 (for TEP DSR1) (#27134)
Signed-off-by: Duncan Moss <djm.moss@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-11-14 08:02:44 -08:00 |
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