 Cyrus Leung
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845ee348ef
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[Misc] Standardize handling of mm_processor_kwargs.size (#35284)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-02-26 13:05:46 +00:00 |
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Cyrus Leung
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987506bca6
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[Refactor] Simplify dummy data generation (#35025)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-02-22 20:55:27 -08:00 |
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Cyrus Leung
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372b2e762a
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[Bugfix] Standardize getting number of image patches/tokens (#34358)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-02-12 20:47:01 -08:00 |
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Isotr0py
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0ab06100f4
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[Multimodal] Expose mm_processor_kwargs for DummyInputsBuilder (#34330)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2026-02-11 09:37:40 -08:00 |
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85ee1d962b
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[Bugfix] Fix models and tests for transformers v5 (#33977)
Signed-off-by: raushan <raushan@huggingface.co>
Signed-off-by: Raushan Turganbay <raushan.turganbay@alumni.nu.edu.kz>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-02-06 21:47:41 +08:00 |
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Cyrus Leung
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51550179fc
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[Refactor] Define MM data parser in processing info instead of processor itself (#33260)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-01-29 13:55:17 +08:00 |
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Iris
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bd92089d33
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feature: support eagle3 for HunyuanVL & Hunyuan (#33035)
Signed-off-by: irisliu10 <601012173@qq.com>
Signed-off-by: Iris <38269816+irisliu10@users.noreply.github.com>
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2026-01-27 17:55:48 +00:00 |
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Matthew Bonanni
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a608b4c6c2
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[5/N][Attention] Finish eliminating vllm/attention folder (#32064)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-01-27 10:02:51 -05:00 |
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Cyrus Leung
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dcd80206b7
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[Chore] Update type annotation of input_ids in model forward (#33063)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-01-26 06:02:10 -08:00 |
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Isotr0py
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9ad7f89f55
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[Models]: Make Multimodal config implicit in ViT implementation (#31972)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2026-01-24 20:34:26 +08:00 |
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Cyrus Leung
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e1a34c3a5d
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[2/N] Initialize MM components in context managers (E-H) (#32641)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-01-20 08:12:56 +00:00 |
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Cyrus Leung
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9ea07b41da
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[1/N] Reorganize multimodal processing code (#32327)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2026-01-14 15:25:31 +00:00 |
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Matthew Bonanni
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2612ba9285
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[1/N][Attention] Restructure attention: move files (#31916)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-01-09 13:10:24 -08:00 |
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Isotr0py
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700a5ad6c6
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[MM Encoder]: Migrate legacy ViT MultiHeadAttention to new MMEncoderAttention interface (#30684)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-12-19 02:04:19 +08:00 |
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Anker
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e8e8cd73e5
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[Bugfix] Fix HunyuanOCR cross-image contamination in batch processing (#30344)
Signed-off-by: Lennart Brog <lennart.borg@list-ag.de>
Signed-off-by: Anker <20343812+anker-c2@users.noreply.github.com>
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2025-12-10 18:09:31 +00:00 |
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Cyrus Leung
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671427efbf
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[Model] Move multimodal_cpu_fields definition to field config (#30181)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-12-06 13:40:02 +00:00 |
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Cyrus Leung
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c46b932df2
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[Chore] Deprecate SupportsMultiModal.merge_by_field_config (#30170)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-12-06 07:57:28 +00:00 |
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Cyrus Leung
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9ae2f60374
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[Misc] Various cleanups for MM input processing (#29970)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-12-04 06:22:20 +00:00 |
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Isotr0py
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a21cd9ed23
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[Bugfix] Fix incorrect image_grid_thw rank for HunyuanOCR from missing merge_by_field_config=True (#29950)
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
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2025-12-03 10:05:10 +00:00 |
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Roger Wang
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cf348c8d27
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[Bugfix] Fix HunyuanVL XD-RoPE (#29593)
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored by: grider-transwithai <grider@transwith.ai>
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2025-11-27 12:36:24 +00:00 |
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92effb07a4
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[Model] Add HunyuanOCR support (#29327)
Signed-off-by: manayang <jackmanayang@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored-by: sergeywang <sergeywang@tencent.com>
Co-authored-by: manayang <jackmanayang@gmail.com>
Co-authored-by: manayang <manayang@tencent.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
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2025-11-25 03:28:51 +00:00 |
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