 Roger Wang
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e6e42e4b17
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[Core][VLM] Support image embeddings as input (#6613)
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2024-08-12 16:16:06 +08:00 |
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Isotr0pyandCyrus Leung
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b764547616
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[Bugfix] Fix input processor for InternVL2 model (#7164)
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
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2024-08-07 09:32:07 -07:00 |
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Cyrus LeungandRoger Wang
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1f26efbb3a
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[Model] Support SigLIP encoder and alternative decoders for LLaVA models (#7153)
Co-authored-by: Roger Wang <136131678+ywang96@users.noreply.github.com>
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2024-08-06 16:55:31 +08:00 |
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Isotr0py
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0c25435daa
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[Model] Refactor and decouple weight loading logic for InternVL2 model (#7067)
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2024-08-02 22:36:14 -07:00 |
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Cyrus Leung
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daed30c4a9
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[Bugfix] Fix feature size calculation for LLaVA-NeXT (#6982)
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2024-07-31 23:46:17 +08:00 |
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Isotr0pyandRoger Wang
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7cbd9ec7a9
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[Model] Initialize support for InternVL2 series models (#6514)
Co-authored-by: Roger Wang <ywang@roblox.com>
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2024-07-29 10:16:30 +00:00 |
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