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dea268336f
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[1/N] Elastic EP Milestone 2 (#34861)
Signed-off-by: Yongji Wu <wuyongji317@gmail.com>
Signed-off-by: Itay Alroy <ialroy@nvidia.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Signed-off-by: Ron Tourgeman <rtourgeman@nvidia.com>
Co-authored-by: Yongji Wu <wuyongji317@gmail.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Ron Tourgeman <rtourgeman@nvidia.com>
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2026-02-28 04:46:42 +00:00 |
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emricksini-h
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325ab6b0a8
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[Feature] OTEL tracing during loading (#31162)
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2026-02-05 16:59:28 -08:00 |
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Kunshang Ji
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2a2d5d2780
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Replace torch.cuda.Event with torch.Event for better hardware compatibility (#26985)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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2025-11-18 11:34:36 -08:00 |
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Li, Jiang
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577bb34fff
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[CPU][Bugfix] Fix _to_list in CPU model runner (#28824)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-17 07:47:24 +00:00 |
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Li, Jiang
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7f829be7d3
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[CPU] Refactor CPU attention backend (#27954)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-12 09:43:06 +08:00 |
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Harry Mellor
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8fcaaf6a16
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Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-12 09:51:31 -07:00 |
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Cyrus Leung
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1e4ecca1d0
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[V0 Deprecation] Remove VLLM_USE_V1 from tests (#26341)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-10-07 15:42:31 +00:00 |
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Harry Mellor
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d6953beb91
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Convert formatting to use ruff instead of yapf + isort (#26247)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-10-05 07:06:22 -07:00 |
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Li, Jiang
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5c057e068f
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[CPU] Refine batch reorder of CPU attention backend (#26096)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-10-04 21:54:35 +08:00 |
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Jee Jee Li
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2821986450
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[Core] Modify the initialization parameters of the lora manager (#25249)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-09-19 18:01:28 +00:00 |
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Li, Jiang
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9fccd04e30
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[Bugfix] Fix Stream usage in CPU model runner and OneDNN kernel check (#25046)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-09-17 05:54:02 -07:00 |
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Nick Hill
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eeb135eb87
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[Core] Use CpuGpuBuffer for block table tensors (#24795)
Signed-off-by: Nick Hill <nhill@redhat.com>
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2025-09-16 19:18:06 -07:00 |
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567939953b
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[Core/DBO][1/N] Add Dual-Batch Overlap mechanism to VLLM (#23693)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Sage Moore <sage@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Co-authored-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2025-09-16 12:21:48 -04:00 |
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RemyandLi, Jiang <jiang1.li@intel.com>
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feaf202e93
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[Bugfix] Guard _may_reorder_batch for encoder-only models on CPU (#24319) (#24348)
Signed-off-by: Remy <eunhwan.shin@dtonic.io>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2025-09-10 14:24:42 +08:00 |
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Ning Xie
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499b074bfd
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[Misc] refactor code by import as for torch._inductor.config (#23677)
Signed-off-by: Andy Xie <andy.xning@gmail.com>
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2025-09-01 14:05:42 +08:00 |
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Ning Xie
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e80bca309e
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[Refactor] refactor freezing_value/cuda_event initialize outside try finally (#23758)
Signed-off-by: Andy Xie <andy.xning@gmail.com>
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2025-08-30 06:42:25 -07:00 |
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Li, Jiang
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ad39106b16
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[CPU] Enable data parallel for CPU backend (#23903)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-08-29 02:19:58 -07:00 |
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Didier Durand
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d3da2eea54
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[Doc]: fix typos in Python scripts (#23828)
Signed-off-by: Didier Durand <durand.didier@gmail.com>
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2025-08-28 05:37:38 -07:00 |
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Woosuk Kwon
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04ff1e43fb
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[Misc] Move CpuGpuBuffer to vllm/v1/utils.py (#23728)
Signed-off-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
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2025-08-27 03:25:00 -07:00 |
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Li, Jiang
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9b0187003e
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[Bugfix] Fix cuda event usage with CPU model runner (#23643)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-08-26 17:10:42 +00:00 |
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Ning Xie
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87f48623a5
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[Misc] method name typo fix (#23042)
Signed-off-by: Andy Xie <andy.xning@gmail.com>
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2025-08-16 21:49:14 -07:00 |
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Lucas Wilkinson
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1dc8a70b6d
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[Attention] Support multiple attention metadata builders per kv_cache_spec + proper local attention no hybrid kv cache fix (#21588)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2025-08-06 18:40:52 -07:00 |
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Thomas Parnell
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4abfd8796f
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[V1] [Hybrid] Validate compatibility of attention backend batch reordering at init time (#21557)
Signed-off-by: Thomas Parnell <tpa@zurich.ibm.com>
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2025-08-02 05:29:40 -07:00 |
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Maximilien de BayserandRussell Bryant
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1cd6eaba54
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Support encoder-only models without KV-Cache (#21270)
Signed-off-by: Max de Bayser <maxdebayser@gmail.com>
Signed-off-by: Max de Bayser <mbayser@br.ibm.com>
Co-authored-by: Russell Bryant <rbryant@redhat.com>
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2025-07-26 21:09:52 +08:00 |
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Li, Jiang
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e3a0e43d7f
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[bugfix] Fix auto thread-binding when world_size > 1 in CPU backend and refactor code (#21032)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-07-19 05:13:55 -07:00 |
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Rui Qiao
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217937221b
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Elastic Expert Parallel Initial Support (#20775)
Signed-off-by: Rui Qiao <ruisearch42@gmail.com>
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2025-07-18 17:46:09 -07:00 |
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Cyrus Leung
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45badd05d0
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[Core] Set pooling params based on task and model (#21128)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
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2025-07-18 05:41:17 -07:00 |
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Jee Jee Li
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1caca5a589
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[Misc] Add SPDX-FileCopyrightText (#20428)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2025-07-04 07:40:42 +00:00 |
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Li, Jiang
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53da4cd397
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[Bugfix][CPU] Fix InputBatch for pooling models in the CPU v1 (#20014)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-06-24 13:20:04 +00:00 |
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Li, Jiang
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6458721108
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[CPU] Refine default config for the CPU backend (#19539)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-06-13 13:27:39 +08:00 |
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Li, Jiang
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4555143ea7
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[CPU] V1 support for the CPU backend (#16441)
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2025-06-03 18:43:01 -07:00 |
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