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vLLM/vllm/platforms
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liuzhenweiandKunshang Ji e599e2c65e [XPU][P/D] Add XPU support in NixlConnector (#22436)
Signed-off-by: zhenwei <zhenwei.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2025-09-04 21:03:12 -07:00
..
__init__.py
[TPU] Support Pathways in vLLM (#21417)
2025-07-30 10:02:12 -07:00
cpu.py
[CPU] Enable data parallel for CPU backend (#23903)
2025-08-29 02:19:58 -07:00
cuda.py
[Attention] FlashAttn MLA (#14258)
2025-09-04 02:47:59 -07:00
interface.py
[Attention] FlashAttn MLA (#14258)
2025-09-04 02:47:59 -07:00
neuron.py
[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)
2025-07-07 04:32:32 +00:00
rocm.py
[XPU] Add xpu torch.compile support (#22609)
2025-08-27 05:33:27 +00:00
tpu.py
[XPU][P/D] Add XPU support in NixlConnector (#22436)
2025-09-04 21:03:12 -07:00
xpu.py
[XPU][P/D] Add XPU support in NixlConnector (#22436)
2025-09-04 21:03:12 -07:00
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