3 people 823eaf667d [XPU] FP8 o_proj with fp8_bmm and load-time scale transpose (#48334) ...

Signed-off-by: Wu, Xiaochang <xiaochang.wu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

2026-07-20 16:32:03 +08:00

..

cute_dsl

[Perf][Feat] Add generic cuteDSL LL BF16 router (GEMM) (#42562)

2026-07-13 23:01:21 -07:00

mixed_precision

[ROCm][BugFix] Triton W4A16 handling for GPTQ/AutoGPTQ qzeros layout (#47770)

2026-07-15 11:55:47 -05:00

mxfp4

[Performance] Use CuTe-DSL for FlashInfer MXFP4 quantization (#48417)

2026-07-17 06:53:48 -07:00

mxfp8

[ROCm][Perf] MXFP8 dense-linear + grouped-MoE GEMM optimizations for MiniMax-M3 (#46117)

2026-07-08 04:03:34 +00:00

nvfp4

[Quantization] add humming moe backend to all dense/moe oracles (#41652)

2026-07-06 13:36:07 -07:00

scaled_mm

[XPU] FP8 o_proj with fp8_bmm and load-time scale transpose (#48334)

2026-07-20 16:32:03 +08:00

__init__.py

[XPU][UT]fix _POSSIBLE_KERNELS error on XPU (#47516)

2026-07-17 11:19:05 +00:00

base.py

Add the QuantizedActivation linear-kernel contract (#44260)

2026-06-12 13:48:15 -07:00

zentorch_utils.py

[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)

2026-05-30 14:17:21 -05:00