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0c96dd64fb6a8005b1ba5e2ef335fe4f75d9eb90
vLLM/vllm/model_executor/kernels/linear
T
History
Dipika Sikka e68988a248 Refactor CT NVFP4 linear to use a single class (#42443)
2026-06-04 08:25:08 -04:00
..
mixed_precision
[XPU] [Bug] remove xpuw4a16 output size check (#44168)
2026-06-02 22:26:20 +08:00
mxfp4
[XPU] [CT] Enable CT W4A4MxFp4 path and add xpu kernel (#38896)
2026-05-13 06:43:00 -07:00
mxfp8
[MXFP8] [XPU] add a new compressed tensor schema and add a xpu mxfp8 gemm kernel (#38707)
2026-04-13 16:59:20 +08:00
nvfp4
[Bugfix][CI] Add missing import of pad_nvfp4_activation_for_cutlass in flashinfer (#43237)
2026-05-20 11:59:12 -07:00
scaled_mm
[XPU] Add XPU block-scaled W8A8 fp8 path (#39968)
2026-06-03 20:16:19 +08:00
__init__.py
Refactor CT NVFP4 linear to use a single class (#42443)
2026-06-04 08:25:08 -04:00
base.py
[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (#33892)
2026-04-09 08:50:39 +08:00
zentorch_utils.py
[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (#41813)
2026-05-30 14:17:21 -05:00
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