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16282a9c4ee754bedd67f72b01ac76ae8568dbdd
vLLM
/
vllm
/
kernels
T
History
Andreas Karatzas
d28bdf9344
[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (
#41577
)
...
Signed-off-by: Andreas Karatzas <
akaratza@amd.com
>
2026-05-23 04:31:32 +00:00
..
helion
[Kernel][Helion] Optimize Helion config parsing latency (
#40850
)
2026-05-07 20:27:34 -07:00
triton
[Perf] FP8 FlashInfer Attn for ViT (
#38065
)
2026-04-27 13:44:15 +08:00
__init__.py
[vLLM IR] 1/N Implement IR skeleton and rms_norm op (
#33825
)
2026-03-31 22:15:05 -04:00
aiter_ops.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (
#36823
)
2026-05-01 23:41:15 -04:00
oink_ops.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (
#36823
)
2026-05-01 23:41:15 -04:00
vllm_c.py
[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (
#41577
)
2026-05-23 04:31:32 +00:00
xpu_ops.py
[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (
#36823
)
2026-05-01 23:41:15 -04:00