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16282a9c4ee754bedd67f72b01ac76ae8568dbdd
vLLM
/
vllm
/
model_executor
/
kernels
/
linear
T
History
Divakar Verma
166d14e9bf
[bugfix] skip conch kernel for g_idx reordering (
#45072
)
...
Signed-off-by: Divakar Verma <
divakar.verma@amd.com
>
2026-06-10 23:04:19 +08:00
..
mixed_precision
[bugfix] skip conch kernel for g_idx reordering (
#45072
)
2026-06-10 23:04:19 +08:00
mxfp4
[XPU] [CT] Enable CT W4A4MxFp4 path and add xpu kernel (
#38896
)
2026-05-13 06:43:00 -07:00
mxfp8
[MXFP8] [XPU] add a new compressed tensor schema and add a xpu mxfp8 gemm kernel (
#38707
)
2026-04-13 16:59:20 +08:00
nvfp4
[Bugfix][CI] Add missing import of pad_nvfp4_activation_for_cutlass in flashinfer (
#43237
)
2026-05-20 11:59:12 -07:00
scaled_mm
[Bugfix] Canonicalize FP8 weight layout to (K, N) at the source (
#44735
)
2026-06-08 14:37:36 -06:00
__init__.py
[ROCM] [FEAT] Integrate Aiter hipBLASLt GEMM online tuning (
#40426
)
2026-06-04 23:45:36 -07:00
base.py
[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (
#33892
)
2026-04-09 08:50:39 +08:00
zentorch_utils.py
[CPU][Zen] Route W8A8 and W4A16 linear inference through zentorch on AMD Zen CPUs (
#41813
)
2026-05-30 14:17:21 -05:00