Ma JianandKunshang Ji 8de5cabeb7 [XPU]fix: add XPU platform guards to DeepSeek-V4 ops (#42950) ...

Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

2026-05-23 06:29:45 +08:00

..

__init__.py

[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)

2026-05-19 00:52:54 -07:00

cache_utils.py

[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)

2026-05-19 00:52:54 -07:00

fused_compress_quant_cache.py

[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)

2026-05-19 00:52:54 -07:00

fused_indexer_q.py

[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)

2026-05-19 00:52:54 -07:00

fused_inv_rope_fp8_quant.py

[XPU]fix: add XPU platform guards to DeepSeek-V4 ops (#42950)

2026-05-23 06:29:45 +08:00

fused_qk_rmsnorm.py

[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)

2026-05-19 00:52:54 -07:00