Li, Jiang 65b7a812a2 [CPU] Experimentally enable Triton and MRV2 (#43225) ...

Signed-off-by: jiang1.li <jiang1.li@intel.com>

2026-05-22 01:48:17 -07:00

..

__init__.py

[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)

2026-04-24 04:33:05 +00:00

cpu.py

[CPU] Experimentally enable Triton and MRV2 (#43225)

2026-05-22 01:48:17 -07:00

cuda.py

[GDN] Enable FI Blackwell GDN prefill kernel (#40717)

2026-05-20 01:46:55 -07:00

interface.py

platforms: add uses_cpu_device() hook to Platform for DeviceConfig (#42313)

2026-05-12 12:39:17 -07:00

rocm.py

[6/n] Migrate activation kernels, gptq, gguf, non cutlass w8a8 to libtorch stable ABI (continued) (#42663)

2026-05-20 00:18:12 -07:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[XPU] update xpu graph usage (#43043)

2026-05-19 23:09:07 +08:00

zen_cpu.py

[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)

2026-04-18 06:22:37 +00:00