Liangliang Ma 2c5ebec064 [XPU][CI] add v1/core test in xpu hardware ci (#20537) ...

Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>

2025-07-07 01:16:40 -07:00

..

__init__.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

cpu.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

cuda.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

hpu.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

interface.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

neuron.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

rocm.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

tpu.py

[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (#19410)

2025-07-07 04:32:32 +00:00

xpu.py

[XPU][CI] add v1/core test in xpu hardware ci (#20537)

2025-07-07 01:16:40 -07:00