jatseng-ai 05c50c721e [ROCm] mori: add InterNodeV1LL inter-node kernel selection via VLLM_MORI_INTERNODE_KERNEL (#41751) ...

Signed-off-by: jatseng-ai <jatseng@amd.com>

2026-05-28 00:33:32 +08:00

..

kernels

[Kernel] Enable TritonW4A16LinearKernel as CUDA fallback for non-Marlin-aligned W4A16 shapes (#43731)

2026-05-27 18:36:27 +08:00

layers

[ROCm] mori: add InterNodeV1LL inter-node kernel selection via VLLM_MORI_INTERNODE_KERNEL (#41751)

2026-05-28 00:33:32 +08:00

model_loader

[Core] Add native ModelExpress load format (#43105)

2026-05-21 16:05:01 -04:00

models

[ROCm][CI] Fix ROCm multimodal Qwen2.5-VL activation compile and Phi4MM ragged image mask handling (#43647)

2026-05-26 19:53:34 -07:00

offloader

[Refactor] Clean up log once scope="local" (#40540)

2026-04-22 16:42:43 -04:00

warmup

[CI failure] Temporarily disable using persistent cache for flashinfer autotune (#43119)

2026-05-19 11:44:32 -07:00

__init__.py

[Platform] Deprecate seed_everything (#31659)

2026-01-04 18:34:04 -08:00

custom_op.py

Add ability to replace oot ops when using lora (#37181)

2026-03-16 18:04:15 -07:00

parameter.py

[Quantization] add humming quantization kernel (#34556)

2026-04-24 09:29:44 -04:00

utils.py

[Bugfix][Rocm]Aiter MoE re-uses existing tensor addresses after weight update. (#40390)

2026-05-06 10:32:26 +00:00