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2c06cf3486a67efcbdf265b8a183f9ed836cebb7
vLLM/vllm/platforms
T
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lyd1992 100c7b65e7 [Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
2026-04-24 04:33:05 +00:00
..
__init__.py
[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)
2026-04-24 04:33:05 +00:00
cpu.py
[CPU] Refactor CPU affinity and memory management (#39781)
2026-04-17 21:01:08 +08:00
cuda.py
[Refactor] Clean up log once scope="local" (#40540)
2026-04-22 16:42:43 -04:00
interface.py
[Bugfix] Use is_integrated to detect UMA GPUs for memory reporting (#35356)
2026-04-13 11:07:40 -07:00
rocm.py
[ROCm] Implement GPU-to-NUMA-node detection (#40015)
2026-04-23 10:08:48 -05:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)
2026-01-07 16:07:16 +08:00
xpu.py
[XPU] disable fusion pattern support on XPU platform (#39789)
2026-04-23 10:07:45 +08:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)
2026-04-18 06:22:37 +00:00
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