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iHore/vLLM
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Code Issues Pull Requests Actions 2 Packages Projects Releases Wiki Activity
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2e7fe7e79f41e294eeed2f484eeb791284ec48a2
vLLM/vllm/engine/output_processor
T
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Varun Sundar Rabindranath 19d02ff938 [Bugfix] Fix PP for Multi-Step (#8887)
2024-09-28 08:52:46 -07:00
..
__init__.py
[Speculative decoding 6/9] Integrate speculative decoding with LLMEngine (#3894)
2024-04-16 13:09:21 -07:00
interfaces.py
[Core] Asynchronous Output Processor (#7049)
2024-08-26 20:53:20 -07:00
multi_step.py
[Bugfix] Fix PP for Multi-Step (#8887)
2024-09-28 08:52:46 -07:00
single_step.py
[Bugfix] Fix single output condition in output processor (#7881)
2024-09-02 20:35:42 -07:00
stop_checker.py
[mypy] Enable following imports for entrypoints (#7248)
2024-08-20 23:28:21 -07:00
util.py
[Core] Logprobs support in Multi-step (#7652)
2024-08-29 19:19:08 -07:00
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