3 people 22524f7a92 [Feat] CPU fp8 attn for AMX/AVX-512 (#39445) ...

Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>

2026-04-29 20:43:21 +08:00

..

__init__.py

[Platform] Fix RISC-V platform detection (lscpu parsing + non-NUMA meminfo) (#40427)

2026-04-24 04:33:05 +00:00

cpu.py

[Feat] CPU fp8 attn for AMX/AVX-512 (#39445)

2026-04-29 20:43:21 +08:00

cuda.py

[Refactor] Clean up log once scope="local" (#40540)

2026-04-22 16:42:43 -04:00

interface.py

[Bugfix] Use is_integrated to detect UMA GPUs for memory reporting (#35356)

2026-04-13 11:07:40 -07:00

rocm.py

[ROCm][CI] Add missing quantization methods and fix online quant test failures (#39801)

2026-04-27 15:08:57 -05:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[XPU] disable fusion pattern support on XPU platform (#39789)

2026-04-23 10:07:45 +08:00

zen_cpu.py

[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)

2026-04-18 06:22:37 +00:00