Ma JianandKunshang Ji ef0d084b4b [XPU] Fix FP8 block scale layout for MLA compatibility (#50349) ...

Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

2026-07-31 11:05:35 +08:00

..

attention

[Attention][DSA] support dcp for FLASHINFER_MLA_SPARSE (#46076)

2026-07-01 00:32:20 -04:00

linear

[XPU] Fix FP8 block scale layout for MLA compatibility (#50349)

2026-07-31 11:05:35 +08:00

mhc

[Bugfix] Fix mHC block-M prenorm GEMM cross-row reduction carry-over (#49429)

2026-07-27 04:42:47 +00:00

__init__.py

[Refactor] [1/N] Reorganize kernel abstraction directory (#34055)

2026-02-24 06:47:22 +00:00