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360f33f61ce02bda04bcb7ea876f1d2e5af8d06d
vLLM/vllm/compilation/passes
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Qidong SuandOpenAI Codex 9e137d8d23 [Kernel] Enable optimized FlashInfer add-RMSNorm NVFP4 fusion (#51925)
Signed-off-by: Qidong Su <qidongs@nvidia.com>
Signed-off-by: Qidong Su <soodoshll@gmail.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
2026-09-08 17:20:32 -07:00
..
fusion
[Kernel] Enable optimized FlashInfer add-RMSNorm NVFP4 fusion (#51925)
2026-09-08 17:20:32 -07:00
ir
Preserve layout-changing clones (#44574)
2026-06-05 20:45:24 -04:00
utility
[Kernel] Enable optimized FlashInfer add-RMSNorm NVFP4 fusion (#51925)
2026-09-08 17:20:32 -07:00
__init__.py
[torch.compile] Reorganize vllm/compilation and tests/compile (0/N for vLLM IR) (#33731)
2026-02-06 04:19:49 -08:00
fx_utils.py
[Refactor] Remove utils dead code (#53941)
2026-09-08 11:22:09 -04:00
inductor_pass.py
Speed up docs build (#44635)
2026-06-05 14:51:44 +00:00
pass_manager.py
[ROCm] Enable AITER and FP8 inference on GFX120x (#43615)
2026-08-03 16:45:37 -05:00
vllm_inductor_pass.py
[Refactor] Remove multiple dead codes (#50285)
2026-08-03 10:59:08 -04:00
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