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36fa72d2d0d2f86c7c83e1e99c9012b7bd26463b
vLLM/vllm/platforms
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Tianmu LiOpenAI CodexLi, Jiang <jiang1.li@intel.com>
23cd0346ce [CPU] Align scheduler and NIXL CPU affinity per local rank (#53636)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
2026-09-17 16:43:08 +08:00
..
__init__.py
Add pydocstyle to the ruff rules (#52136)
2026-09-16 16:44:29 +00:00
cpu.py
[CPU] Align scheduler and NIXL CPU affinity per local rank (#53636)
2026-09-17 16:43:08 +08:00
cuda.py
[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
2026-09-16 10:57:24 -07:00
interface.py
[CI] Ignore ruff D209, rejoin the docstrings it split, and silence incompatible-rule warnings (#57212)
2026-09-16 10:57:24 -07:00
rocm.py
[ROCm] Stage large pageable H2D copies instead of registering them (#56343)
2026-09-17 07:14:43 +00:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)
2026-01-07 16:07:16 +08:00
xpu.py
Add pydocstyle to the ruff rules (#52136)
2026-09-16 16:44:29 +00:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (#39967)
2026-04-18 06:22:37 +00:00
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