Logo
Explore Help
Sign In
iHore/vLLM
Watch 8
Star 0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity
Files
3e372c5ff23438eeeafc86c7d8d51026f3dacb6a
vLLM/vllm/model_executor/kernels
T
History
zofiaandKunshang Ji 52c70b210c [XPU] [Linear] enable torch linear backend for blockwise gemm on xpu (#50826)
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
2026-08-11 16:43:33 +08:00
..
attention
[Attention][DSA] support dcp for FLASHINFER_MLA_SPARSE (#46076)
2026-07-01 00:32:20 -04:00
linear
[XPU] [Linear] enable torch linear backend for blockwise gemm on xpu (#50826)
2026-08-11 16:43:33 +08:00
mhc
[Bugfix] Fix mHC block-M prenorm GEMM cross-row reduction carry-over (#49429)
2026-07-27 04:42:47 +00:00
__init__.py
[Refactor] [1/N] Reorganize kernel abstraction directory (#34055)
2026-02-24 06:47:22 +00:00
Powered by Gitea Version: 1.27.2 Page: 510ms Template: 6ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API