Ma JianandKunshang Ji a5bbd81e2e [XPU]feat: enable FP8 block-scaled quantization on XPU (#42952) ...

Signed-off-by: Ma Jian <jian1.ma@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

2026-05-23 12:33:18 +08:00

..

mixed_precision

[XPU] add gptq(int4) support (#37844)

2026-05-19 11:17:09 +08:00

mxfp4

[XPU] [CT] Enable CT W4A4MxFp4 path and add xpu kernel (#38896)

2026-05-13 06:43:00 -07:00

mxfp8

[MXFP8] [XPU] add a new compressed tensor schema and add a xpu mxfp8 gemm kernel (#38707)

2026-04-13 16:59:20 +08:00

nvfp4

[Bugfix][CI] Add missing import of pad_nvfp4_activation_for_cutlass in flashinfer (#43237)

2026-05-20 11:59:12 -07:00

scaled_mm

[XPU]feat: enable FP8 block-scaled quantization on XPU (#42952)

2026-05-23 12:33:18 +08:00

__init__.py

[XPU]feat: enable FP8 block-scaled quantization on XPU (#42952)

2026-05-23 12:33:18 +08:00

base.py

[W8A8 Block Linear Refactor][2/N] Remove W8A8Fp8BlockLinearOp and adopt Fp8 block linear kernel selections. (#33892)

2026-04-09 08:50:39 +08:00