Chaojun Zhang 13c49f9845 [xpu][lora]: Align LoRA implementation with Punica GPU: fix _apply_expand rank mismatch, add_inputs hardcode, and MoE EP (#45368) ...

Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>

2026-07-01 22:14:04 +08:00

..

torch_ops

Convert formatting to use ruff instead of yapf + isort (#26247)

2025-10-05 07:06:22 -07:00

triton_ops

[ROCm][Bugfix] Fix Triton "out of resource: shared memory" Error In One-Shot LoRA MoE (#47209)

2026-06-30 23:24:36 -07:00

xpu_ops

[xpu][lora]: Align LoRA implementation with Punica GPU: fix _apply_expand rank mismatch, add_inputs hardcode, and MoE EP (#45368)

2026-07-01 22:14:04 +08:00

__init__.py

[Kernel][RFC] Refactor the punica kernel based on Triton (#5036)

2024-07-31 17:12:24 -07:00