Divakar Verma 4ca3fa6bb4 [ROCm][Bugfix] fix cache block size mismatch for aiter unified attention (#37606) ...

Signed-off-by: Divakar Verma <divakar.verma@amd.com>

2026-03-20 00:00:08 +00:00

..

__init__.py

In-Tree AMD Zen CPU Backend via zentorch [1/N] (#35970)

2026-03-15 23:35:35 +00:00

cpu.py

[Bugfix] Avoid more OpenMP thread reallocation in CPU torch compile (#37538)

2026-03-19 10:24:39 +00:00

cuda.py

[1/n] Migrate permute_cols to libtorch stable ABI (#31509)

2026-03-19 11:27:26 -04:00

interface.py

In-Tree AMD Zen CPU Backend via zentorch [1/N] (#35970)

2026-03-15 23:35:35 +00:00

rocm.py

[ROCm][Bugfix] fix cache block size mismatch for aiter unified attention (#37606)

2026-03-20 00:00:08 +00:00

tpu.py

[Refactor][TPU] Remove torch_xla path and use tpu-inference (#30808)

2026-01-07 16:07:16 +08:00

xpu.py

[XPU] Support LoRA via torch.compile on XPU platform (#36962)

2026-03-13 10:34:59 +00:00

zen_cpu.py

In-Tree AMD Zen CPU Backend via zentorch [1/N] (#35970)

2026-03-15 23:35:35 +00:00