Li, Jiang a2ae496589 [CPU] Support FP8 KV cache (#14741) ...

Signed-off-by: jiang1.li <jiang1.li@intel.com>

2025-03-14 22:07:36 -07:00

..

__init__.py

[platforms] improve rocm debugging info (#14257)

2025-03-04 21:32:18 -08:00

cpu.py

[CPU] Support FP8 KV cache (#14741)

2025-03-14 22:07:36 -07:00

cuda.py

dynamic distpatch of fp8 kernels (#14245)

2025-03-11 10:54:56 -04:00

hpu.py

[platform] add base class for communicators (#13208)

2025-02-16 22:14:22 +08:00

interface.py

dynamic distpatch of fp8 kernels (#14245)

2025-03-11 10:54:56 -04:00

neuron.py

[Neuron] Add Neuron device communicator for vLLM v1 (#14085)

2025-03-10 18:37:04 -07:00

openvino.py

[Misc] set single whitespace between log sentences (#13771)

2025-02-25 10:26:12 +08:00

rocm.py

dynamic distpatch of fp8 kernels (#14245)

2025-03-11 10:54:56 -04:00

tpu.py

[V1] TPU - Enable prefix caching by default (#14773)

2025-03-13 20:40:05 -07:00

xpu.py

[Misc] set single whitespace between log sentences (#13771)

2025-02-25 10:26:12 +08:00