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4e04bcbce6f0852017d26660dd2d027de9bed7d5
vLLM
/
vllm
/
platforms
T
History
Rehan Khan
and
Li, Jiang <jiang1.li@intel.com>
9e57de7197
[CPU] Create Proper Numa topology for s390x (
#40714
)
...
Signed-off-by: Rehan Khan <
Rehan.Khan7@ibm.com
> Co-authored-by: Li, Jiang <
jiang1.li@intel.com
>
2026-07-13 12:58:43 +08:00
..
__init__.py
[Core] Ensure memory is pinned prior to async h2d copy (
#45424
)
2026-06-20 20:02:24 -07:00
cpu.py
[CPU] Create Proper Numa topology for s390x (
#40714
)
2026-07-13 12:58:43 +08:00
cuda.py
Fix NVML capability lookup for visible devices (
#47892
)
2026-07-08 09:07:44 -04:00
interface.py
Fix NVML capability lookup for visible devices (
#47892
)
2026-07-08 09:07:44 -04:00
rocm.py
[2/N][KV-Cache Layout Refactor] Pack K/V into the content dim across attention backends (
#44455
)
2026-07-11 11:11:16 -04:00
tpu.py
[Refactor][TPU] Remove torch_xla path and use tpu-inference (
#30808
)
2026-01-07 16:07:16 +08:00
xpu.py
[XPU] [Fusion passes] Disable fuse_rope_kvcache_cat_mla & qk_norm_rope_ fusion on XPU (
#47962
)
2026-07-08 09:23:06 +00:00
zen_cpu.py
[ZenCPU] AMD Zen CPU Backend with supported dtypes via zentorch weekly (
#39967
)
2026-04-18 06:22:37 +00:00